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In this paper, a new method is presented to design highly efficient harmonic-tuned (HT) power amplifier at C-band. This method reverses the load and source impedance determination sequence that commonly used in a traditional PA design process. This avoids iterations and post-adjustment due to the distortion impact of the 2 ^nd harmonic source impedance. Consequently, the proposed method can greatly simplify the design process. Simulation results reveals that, the optimal source impedance condition obtained from Class B amplifier can be applied to the design of a harmonic-tuned Class F ⁻¹ PA and produce a drain efficiency of up to 76.5%. Furthermore, the source-pull simulation conducted to a transistor terminated with a Class F ⁻¹ load network reveals that, the designed HT PA does not need further iteration or post-adjustment. This verifies the feasibility of the proposed method.