作者
Sudarshan Srinivasan, Rance Rodrigues, Arunachalam Annamalai, Israel Koren, Sandip Kundu
发表日期
2013/8/5
研讨会论文
2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
页码范围
46-51
出版商
IEEE
简介
Asymmetric Multicore Processors (AMP) have emerged as likely candidates to solve the performance/power conundrum in the current generation of processors. Most recent work in this area evaluate such multicores by considering large (usually out-of-order (OOO)) and small (usually in-order (InO)) cores on the same chip. Dynamic online swapping of threads between these cores is then facilitated whenever deemed beneficial. However, if threads are swapped too often, the overheads may negatively impact the benefits of swapping. Hence, in most recent work, thread swapping decisions are made at coarse grain instruction granularities, leaving out many opportunities. In this paper, we propose a scheme to mitigate the penalty imposed by thread swapping and yet achieve all the benefits of AMPs. Here, a single superscalar OOO core morphs itself into an InO core at runtime, whenever determined to be …
引用总数
2016201720182019202020212022202320243211
学术搜索中的文章
S Srinivasan, R Rodrigues, A Annamalai, I Koren… - 2013 IEEE Computer Society Annual Symposium on …, 2013