作者
Richard L Rudell, Alberto Sangiovanni-Vincentelli
发表日期
1987/9
期刊
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
卷号
6
期号
5
页码范围
727-750
出版商
IEEE
简介
This paper describes both a heuristic algorithm, Espresso-MV, and an exact algorithm, Espresso-EXACT, for minimization of multiple-valued input, binary-valued output logic functions. Minimization of these functions is an important step in the optimization of programmable logic arrays (PLA's). In particular, the problems of two-level multiple-output minimization, minimization of PLA's with input decoders and solutions to the input encoding problem rely on efficient solutions to the multiple-valued minimization problem. Results are presented for a large class of PLA's taken from actual chip designs. These results show that the heuristic algorithm Espresso-MV comes very close to producing optimum solutions for most of the examples. Also, results from a chip design in progress at Berkeley show how important multiple-valued minimization can be for PLA optimization.
引用总数
学术搜索中的文章
RL Rudell, A Sangiovanni-Vincentelli - IEEE Transactions on Computer-Aided Design of …, 1987