作者
Stephen T Kim, Yi-Chun Shih, Kaushik Mazumdar, Rinkle Jain, Joseph F Ryan, Carlos Tokunaga, Charles Augustine, Jaydeep P Kulkarni, Krishnan Ravichandran, James W Tschanz, Muhammad M Khellah, Vivek De
发表日期
2015/2/22
研讨会论文
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of Technical Papers
页码范围
1-3
出版商
IEEE
简介
A graphics execution core in 22nm improves energy efficiency across a wide DVFS range, from the near-threshold voltage (NTV) region, where circuit assist lowers intrinsic V M!N , to the turbo region, where adaptive clocking reduces the voltage-droop guard-band [1]. When powered with a shared rail, however, energy is wasted in the core if other blocks demand higher voltage and performance. Alternately, a per-core fully-integrated voltage regulator (VR) provides a cost-effective means to realize autonomous DVFS [2-4].
学术搜索中的文章
ST Kim, YC Shih, K Mazumdar, R Jain, JF Ryan… - 2015 IEEE International Solid-State Circuits …, 2015