发明者
Jean Louis Calvignac, Marco Heddes, Joseph Franklin Logan
发表日期
2006/8/1
专利局
US
专利号
7085266
专利申请号
10095792
简介
An interface to interconnect chips in a multi-chip system includes a limited set of messages and circuit arrangements to generate the limited set of messages. The chips can be configured in different operational modes which dictates what portion of a frame is to be transmitted between selected chips of the system.
学术搜索中的文章
JL Calvignac, M Heddes, JF Logan - US Patent 7,085,266, 2006