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Multi-project-wafer (MPW) services provide an economical route for prototyping of new electronic circuit designs. However, addition of MEMS functionality to MPW circuits by post-processing (also known as MEMS-last processing) is difficult and inefficient because MPW typically yields individual dies. One solution to this problem is to embed the MPW dies in a carrier wafer prior to MEMS processing. We have developed a process which allows 300 μm-thick CMOS dies to be embedded in a BSOI (bonded silicon-on-insulator) carrier prior to low-temperature processing for integration of metal MEMS. Deep reactive ion etching (DRIE) with an STS Multiplex ICP etcher is used to form cavities in the device layer of a BSOI wafer. By adjusting the passivation and etching cycles, the DRIE process has been optimized to produce near-vertical sidewalls when stopping on the buried oxide layer. The cavity sizes are closely …