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This paper reports on the design, realization and characterization of a True Random Number Generator (TRNG) that operates using as seeds of entropy, the jitter and the metastability introduced by primitives of a Field Programmable Gate Arrays (FPGA) board. In particular, the TRNG architecture has been implemented on a Xilinx Ultrascale XCKU040 FPGA board. Generally, the implementations on FPGA of fully-digital TRNGs make use of ring oscillators employing a large number of Look-Up-Table (LUT) blocks. Differently from this approach, this paper demonstrates that a reliable FPGA-based TRNG architecture can be realized mainly employing only a single PLL and three on-board primitives together with other few basic logic elements (i.e., 8 D-type Flip-Flop, 17 LUT and 2 Counters) used only for the initial overall system synchronization and post-processing operations. In this way, the proposed solution largely …