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This paper presents the power consumption measurement performed on the multi-core digital signal processor. The selected processor TMS320C6678 from Texas Instruments is suitable for high performance computing, and it is based on very long instruction word architecture. Each core consists of 8 functional units, but the processor's instruction packets do not require specific operations for all functional units at every CPU cycle. Both theoretical and real-world applications are proposed in the paper and the measurement results show, how power consumption can be affected by using different functional units, as well as the different types of instructions. A model of power consumption on this platform has been proposed for a particular instruction setup.