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This letter presents a highly digital, technology scalable, and energy-efficient cryptographic-quality true random number generator (TRNG). The proposed architecture presents a balanced approach to TRNG design, relying on a simpler, noncryptographic quality physical random number generator ( phy RNG) combined with energy-efficient integrated post-processing to de-correlate and de-bias the phy RNG bitstream. Operating at a supply voltage ( of 0.53 V, a 65-nm CMOS prototype of the TRNG achieves a peak energy-efficiency of 2.58 pJ/bit. TRNG bitstreams pass all NIST randomness benchmarks over a range of 0.5–1.05 V across −20 °C–100 °C, demonstrating its efficacy and robust operation over a wide and temperature range.