作者
Zeinab Ganjei, Ahmed Rezine, Petru Eles, Zebo Peng
发表日期
2017/10/2
研讨会论文
2017 Formal Methods in Computer Aided Design (FMCAD)
页码范围
68-75
出版商
IEEE
简介
We address the problem of statically checking control state reachability (as in possibility of assertion violations, race conditions or runtime errors) and plain reachability (as in deadlock-freedom) of phaser programs. Phasers are a modern non-trivial synchronization construct that supports dynamic parallelism with runtime registration and deregistration of spawned tasks. They allow for collective and point-to-point synchronizations. For instance, phasers can enforce barriers or producer-consumer synchronization schemes among all or subsets of the running tasks. Implementations are found in modern languages such as Habanero Java. Phasers essentially associate phases to individual tasks and use their runtime values to restrict possible concurrent executions. Unbounded phases may result in infinite transition systems even in the case of programs only creating finite numbers of tasks and phasers. We introduce …
引用总数
2018201920202021211
学术搜索中的文章
Z Ganjei, A Rezine, P Eles, Z Peng - 2017 Formal Methods in Computer Aided Design …, 2017