Low-power 4x4 bit Array Two-Phase Clocked Adiabatic Static CMOS Logic Multiplier
作者
Nazrul Anuar Nayan, Yasuhiro Takahashi, Toshikazu Sekine
发表日期
2010
期刊
Far East Journal of Electronics and Communications
卷号
5
期号
1
页码范围
1-13
出版商
Pushpa Publishing House
引用总数
20112012201320142015201620172018201920202021202220231471555113111
学术搜索中的文章
N Anuar, Y Takahashi, T Sekine - 2010 18th IEEE/IFIP International Conference on VLSI …, 2010