作者
Chen Chen, W Scott Lee, Roozbeh Parsa, Soogine Chong, J Provine, Jeff Watt, Roger T Howe, H-S Philip Wong, Subhasish Mitra
发表日期
2012/3/12
研讨会论文
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)
页码范围
1361-1366
出版商
IEEE
简介
Nano-Electro-Mechanical (NEM) relays are excellent candidates for programmable routing in Field Programmable Gate Arrays (FPGAs). FPGAs that combine CMOS circuits with NEM relays are referred to as CMOS-NEM FPGAs. In this paper, we experimentally demonstrate, for the first time, correct functional operation of NEM relays as programmable routing switches in FPGAs, and their programmability by utilizing hysteresis properties of NEM relays. In addition, we present a technique that utilizes electrical properties of NEM relays and selectively removes or downsizes routing buffers for designing energy-efficient CMOS-NEM FPGAs. Simulation results indicate that such CMOS-NEM FPGAs can achieve 10-fold reduction in leakage power, 2-fold reduction in dynamic power, and 2-fold reduction in area, simultaneously, without application speed penalty when compared to a 22nm CMOS-only FPGA.
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C Chen, WS Lee, R Parsa, S Chong, J Provine, J Watt… - 2012 Design, Automation & Test in Europe Conference …, 2012