作者
Frederik Naessens, Veerle Derudder, Hans Cappelle, Lieven Hollevoet, Praveen Raghavan, Mattias Desmet, AM AbdelHamid, Ilse Vos, Luc Folens, Stephen O'Loughlin, Suresh Singirikonda, Steven Dupont, J-W Weijers, Antoine Dejonghe, Liesbet Van der Perre
发表日期
2010/6/16
研讨会论文
2010 Symposium on VLSI Circuits
页码范围
213-214
出版商
IEEE
简介
This paper describes the implementation of a flexible Turbo and LDPC outer modem engine which is capable of supporting the WiFi(802.11n), WiMax(802.16e) and 3GPPLTE standard on the same hardware resources. The chip is implemented in a 65nm CMOS technology and occupies 10.37 mm 2 . The decoder flexibility is offered by means of an application-specific instruction-set processor (ASIP), with full datapath reuse between Turbo and LDPC decoding. The encoders are dedicated ASIC datapaths. The maximum clock speed can be set to 320 MHz allowing a decoder output rate for a single iteration in excess of 140 Mbps for Turbo and 640 Mbps for LDPC with a maximum power consumption of 675 mW. The architecture template has been extended to support other standards like the DVB-S2/T2 LDPC decoding as well.
引用总数
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