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3D stacked ICs (3D-SIC) are viable alternatives to overcome limitations faced by mobile MPSoC platforms in 2D designs. In this paper, we evaluate 2D-ICs and 3D-SICs (memory-on-logic) at system architecture level for a complex MPSoC platform instantiated for wireless PHY processing (WLAN, LTE). For a 10-core heterogeneous MPSoC instantiation, we compare its implementations as 2D-IC and 3D-SIC (based on Cu-Cu bonding), and for two different level-1 data memory organization and communication bus structure. We also analyse impact of system level choices (memory organization, communication structure) for both 2D and 3D interconnects.