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This paper presents the novel approach to logic synthesis of finite state machines for FPGA architectures. Traditional methods are based on two steps: internal states encoding and then mapping of encoded state transition table into target architecture. In case of FPGAs the functional decomposition is recognized as the most efficient method of digital circuits’ implementation. However none of known state encoding algorithms can be considered as the best method to be used with the functional decomposition. In this paper the concept of symbolic functional decomposition is introduced. In this method no separate encoding step is required. Symbolic functional decomposition accepts FSM with symbolic states and performs decomposition introducing such state encoding that guarantees the best solution.