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Single-electron technology, as an alternative for Si bulk MOISFET technology in the near future, is distinguished by its very small size and low-power operation. This paper presents an efficient single-electron transistor logic cell which utilizes a new static buffer-based Majority circuit as a consequential building block. The proposed versatile logic cell implements the three-input Nand, Nor, Majority and Xor functions, whereas the three-input Majority and Xor gates together can also be utilized as a Full Adder cell, which is the building block of many important arithmetic circuits. The functionality of the proposed circuit has been verified using SIMulation Of Nanostructure (SIMON) package. The proposed design also outperforms its most prominent SET-based counterpart design in terms the circuit element count and the delay.