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Through silicon via (TSV) technology is key for next generation three-dimensional integrated circuits, and carbon nanotubes (CNT) provide a promising alternative to metal for filling the TSV. Three catalyst preparation methods for achieving CNT growth from the bottom of the TSV are investigated. Compared with sputtering and evaporation, catalyst deposition using dip-coating in a FeCl 2 solution is found to be a more efficient method for realizing a bottom-up filling of the TSV (aspect ratio 5 or 10) with CNT. The CNT bundles grown in 5 min exceed the 50 μm length of the TSV and are multi-wall CNT with three to eight walls. The CNT bundles inside the TSV were electrically characterized by creating a direct contact using a four-point nanoprober setup. A low resistance of the CNT bundle of 69.7 Ω (297 Ω) was measured when the CNT bundle was contacted midway along (over the full length of) the 25 μm deep TSV …