作者
Jainwei Chen, L Kumar Dabbiru, Daniel Wong, Murali Annavaram, Michel Dubois
发表日期
2010/12/4
研讨会论文
Microarchitecture (MICRO), 2010 43rd Annual IEEE/ACM International Symposium on
页码范围
523-534
出版商
IEEE
简介
Current trends signal an imminent crisis in the simulation of future CMPs (Chip Multiprocessors). Future micro-architectures will offer more and more thread contexts to execute parallel programs, but the execution speed of each thread will not improve at the same pace. CMPs with 10’s or even100’s of cores are envisioned. Simulating these future CMP sefficiently without compromising accuracy is a challenge. Slack simulation is a general parallel simulation paradigm which provides flexible trade-offs between simulation accuracy and speed. Simulation threads do not synchronize after every target core cycle as in cycle-by-cycle simulation. Rather a maximum slack (the slack bound) is enforced between the clocks of all simulated cores. A slack simulation may become inaccurate because of simulation violations. Such violations occur when a resource is accessed by two cores in different order in the simulation and in …
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J Chen, LK Dabbiru, D Wong, M Annavaram, M Dubois - 2010 43rd Annual IEEE/ACM International Symposium …, 2010