查看文章

An on/off keying receiver has been designed in 90 nm CMOS for low-power event-driven applications. Thanks to the synchronized-switching technique and power-efficient RF gain stages, this receiver achieves -86 dBm sensitivity (10 ^-3 bit error rate) at 10 kbps while consuming 123 μW from a 1 V supply. The receiver is highly scalable in data rates from 1 kbps at 64 μW to 100 kbps at 146 μW power consumption. The center frequency of the receiver can be also programmed from 780 to 950 MHz, covering different sub-GHz bands worldwide. The receiver is fully integrated, although an external SAW filter can be added for better selectivity.