作者
Guang-Ming Tang, Pei-Yao Qu, Xiao-Chun Ye, Dong-Rui Fan
发表日期
2018/1/31
期刊
IEEE Transactions on Applied Superconductivity
卷号
28
期号
4
页码范围
1-5
出版商
IEEE
简介
A 16-bit bit-slice arithmetic logic unit (ALU) is proposed for 32-/64-bit rapid single-flux-quantum microprocessors. It is based on a Ladner-Fischer adder. The ALU covers all of the ALU operations for MIPS32 instructions set. And each of the two 64-bit operands is divided into four slices of 16 bits each. The ALU uses synchronous concurrent-flow clocking and consists of 11 pipeline stages. The proposed ALU can be used for any 16n-bit processing.
引用总数
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