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System-on-ship (SoC) design in the nanoelectronics era brings us not only many opportunities but also several challenges like synchronization, process uncertainty, global interconnecting delay, high scalability, and reliability. Network on Chip (NoC) could be a communication subsystem and it is rising as a revolutionary design methodology to solve the problems associated with SoC designing. Reliability is one of the major designing challenges in NoC design under technology limitations at low voltage operations and under the influence of very deep sub-micron noise sources, including crosstalk noise. To achieve the reliability of NoC, error controlling codes (ECC) are required. ECCs are broadly categorized as forward error correcting (FEC) codes and error detection codes. ECC improves the reliability of NoC with a penalty of overhead power, delay, and area. In this paper, an attempt has been made to …