Reducing activation recomputation in large transformer models VA Korthikanti, J Casper, S Lym, L McAfee, M Andersch, M Shoeybi, ... Proceedings of Machine Learning and Systems 5, 341-353, 2023 | 127 | 2023 |
Prunetrain: fast neural network training by dynamic sparse model reconfiguration S Lym, E Choukse, S Zangeneh, W Wen, S Sanghavi, M Erez Proceedings of the International Conference for High Performance Computing …, 2019 | 102* | 2019 |
Duo: Exposing on-chip redundancy to rank-level ecc for high reliability SL Gong, J Kim, S Lym, M Sullivan, H David, M Erez 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 42 | 2018 |
DeLTA: GPU performance model for deep learning applications with in-depth memory system traffic analysis S Lym, D Lee, M O'Connor, N Chatterjee, M Erez 2019 IEEE international symposium on performance analysis of systems and …, 2019 | 41 | 2019 |
Near data acceleration with concurrent host access BY Cho, Y Kwon, S Lym, M Erez 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020 | 38* | 2020 |
Branchnet: A convolutional neural network to predict hard-to-predict branches S Zangeneh, S Pruett, S Lym, YN Patt 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 37 | 2020 |
Hamartia: A fast and accurate error injection framework CK Chang, S Lym, N Kelly, MB Sullivan, M Erez 2018 48th Annual IEEE/IFIP International Conference on Dependable Systems …, 2018 | 37 | 2018 |
Evaluating and accelerating high-fidelity error injection for hpc CK Chang, S Lym, N Kelly, MB Sullivan, M Erez Sc18: International conference for high performance computing, networking …, 2018 | 36 | 2018 |
All-inclusive ecc: Thorough end-to-end protection for reliable computer memory J Kim, M Sullivan, S Lym, M Erez ACM SIGARCH Computer Architecture News 44 (3), 622-633, 2016 | 35 | 2016 |
Mini-batch Serialization: CNN Training with Inter-layer Data Reuse S Lym, A Behroozi, W Wen, G Li, Y Kwon, M Erez The Conference on Systems and Machine Learning (SysML), 2018 | 26 | 2018 |
FlexSA: Flexible systolic array architecture for efficient pruned DNN model training S Lym, M Erez arXiv preprint arXiv:2004.13027, 2020 | 24 | 2020 |
ERUCA: Efficient DRAM resource utilization and resource conflict avoidance for memory system parallelism S Lym, H Ha, Y Kwon, C Chang, J Kim, M Erez 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 14 | 2018 |
Write driver circuit, semiconductor apparatus using the same, and memory system SK Lym, HS EM US Patent App. 13/720,739, 2014 | 14 | 2014 |
Near data acceleration with concurrent host access. In 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA) BY Cho, Y Kwon, S Lym, M Erez IEEE, 818ś831, 2020 | 7 | 2020 |
Current control apparatus and phase change memory having the same SK Lym, YJ Shin US Patent 8,526,226, 2013 | 7 | 2013 |
Semiconductor device having memory chip stacks with TSV SK Lym US Patent 9,396,766, 2016 | 6 | 2016 |
Memory system HB Kim, JH Oh, JH Kwon, SK Lym US Patent 9,384,833, 2016 | 4 | 2016 |
Reference voltage generator SK Lym, YJ Shin US Patent 8,791,684, 2014 | 4 | 2014 |
Input/output circuit and input/output device including the same S Lym US Patent 9,607,666, 2017 | 3 | 2017 |
Semiconductor device for supplying and measuring electric current through a pad SK Lym, DK Kim US Patent 8,854,907, 2014 | 3 | 2014 |