ECG performance validation using operational transconductance amplifier with bias current V Vijay, CVSK Reddy, CS Pittala, RR Vallabhuni, M Saritha, M Lavanya, ... International Journal of System Assurance Engineering and Management 12 …, 2021 | 63 | 2021 |
A VLSI design of clock gated technique based ADC lock-in amplifier M Saritha, M Lavanya, G Ajitha, MN Reddy, P Annapurna, M Sreevani, ... International Journal of System Assurance Engineering and Management 13 (5 …, 2022 | 51 | 2022 |
High speed energy efficient multiplier using 20nm FinFET technology VR Ratna, PC Shaker, S Sadulla Chandra and M, Divya and Sadulla, Shaik, High Speed Energy Efficient …, 2020 | 45 | 2020 |
Universal shift register designed at low supply voltages in 15 nm CNTFET using multiplexer RR Vallabhuni, M Saritha, S Chikkapally, V Vijay, CS Pittala, S Shaik International Conference on Emerging Applications of Information Technology …, 2021 | 37 | 2021 |
Biasing Techniques: Validation of 3 to 8 Decoder Modules Using 18nm FinFET Nodes CS Pittala, M Lavanya, M Saritha, V Vijay, SC Venkateswarlu, ... 2021 2nd International Conference for Emerging Technology (INCET), 1-4, 2021 | 36 | 2021 |
PHOTOSENSITIVE SECURITY SYSTEM FOR THEFT DETECTION AND CONTROL USING GSM TECHNOLOGY M SARITHA, H RAGHUPATHI, K SRUTHI REDDY IJARSE 6 (10), 2352-2358, 2017 | 26* | 2017 |
Adaptive and recursive vedic karatsuba multiplier using non linear carry select adder M Saritha, K Chaitanya, V Vijay, A Aishwarya, H Yadav, GD Prasad Journal of VLSI circuits and systems 4 (2), 22-29, 2022 | 25 | 2022 |
Pipelined Distributive Arithmetic-based FIR Filter Using Carry Save and Ripple Carry Adder M Saritha, C Radhika, MN Reddy, M Lavanya, A Karthik, V Vijay, ... 2021 2nd International Conference on Communication, Computing and Industry 4 …, 2021 | 20 | 2021 |
Zigbee based advanced near field communication for hospital appointment system K Hemachandran, M Saritha, M Akhila, G Bhargavi 2018 2nd International Conference on Inventive Systems and Control (ICISC …, 2018 | 5 | 2018 |
Performance of efficient CMOS power amplifier for ISM band applications M Saritha, MJ Rani, M Anand Int. J. Innov. Technol. Explor. Eng 9 (2), 4579-4584, 2019 | 4 | 2019 |
A 45nm CMOS Power Amplifier with Reconfigurable Gain and Improved Linearity . MA M. Saritha, M.Janaki Rani Jour of Adv Research in Dynamical & Control Systems 12 (6), 387-396, 2020 | 3* | 2020 |
Double-threshold energy detection: noisy environment applied cognitive radio K Chaitanya, M Khadir, S Sushma, L Nalla, G Naveen, N Manjula, ... International Journal of System Assurance Engineering and Management 13 (6 …, 2022 | 2 | 2022 |
Methods to Predict the Performance Analysis of Various Machine Learning Algorithms M Saritha, M Lavanya, MN Reddy Bayesian Reasoning and Gaussian Processes for Machine Learning Applications …, 2022 | 2 | 2022 |
Design and Implementation of safe and secure Flow of traffic at signal m. narendra reddy M Srilatha, M Lavanya Journal of critical reviews 7 (9), 2497-2502, 2020 | | 2020 |
Performance of Efficient CMOS Power Amplifier for ISM Band Applications MA M. Saritha, M.Janaki Rani International Journal of Innovative Technology and Exploring Engineering …, 2019 | | 2019 |
A SECURE BIOMETRIC BASED MULTISERVER AUTHENTICATION PROTOCOL USING RFID AND FINGER PRINT MODULE M SARITHA, H RAGHUPATHI, M RAHULRAO AJARSE 6 (10), 2318-2324, 2017 | | 2017 |
REAL TIME MONITORING PREVENTION OF ACCIDENT DUE TO DROWSY BY USNG EYE BLINK SENSOR M SARITHA, H RAGHUPATHI, S MOUNIKA REDDY IJARSE 6 (10), 2333-2342, 2017 | | 2017 |
design and implementation of advanced ARM7 based biometric system using wireless communication m saritha, h raghupathi, s srikar IJARSE 6 (10), 2325-2332, 2017 | | 2017 |
“Brain Tumor Segmentation Using K-Means Approach” MS MR. Maturi.Thirupathi IJRIT International Journal of Research in Information Technology 2 (11), 53-57, 2014 | | 2014 |
Universal Shift Register Designed at Low Supply Voltages in 15 nm CNTFET Using Multiplexer M SARITHA | | |