Device-Aware Test: A New test Approach Towards DPPB Level M Fieback, L Wu, GC Medeiros, H Aziza, S Rao, EJ Marinissen, M Taouil, ... 2019 IEEE International Test Conference (ITC), 1-10, 2019 | 59 | 2019 |
Defect and fault modeling framework for STT-MRAM testing L Wu, S Rao, M Taouil, GC Medeiros, M Fieback, EJ Marinissen, GS Kar, ... IEEE Transactions on Emerging Topics in Computing 9 (2), 707-723, 2019 | 25 | 2019 |
Testing Resistive Memories: Where are We and What is Missing? M Fieback, M Taouil, S Hamdioui 2018 IEEE International Test Conference (ITC), 1-9, 2018 | 25 | 2018 |
Defects, Fault Modeling, and Test Development Framework for RRAMs M Fieback, GC Medeiros, L Wu, H Aziza, R Bishnoi, M Taouil, S Hamdioui ACM Journal on Emerging Technologies in Computing Systems (JETC) 18 (3), 1-26, 2022 | 21 | 2022 |
Intermittent Undefined State Fault in RRAMs M Fieback, GC Medeiros, A Gebregiorgis, H Aziza, M Taouil, S Hamdioui 2021 IEEE European Test Symposium (ETS), 1-6, 2021 | 21 | 2021 |
Testing Computation-in-Memory Architectures Based on Emerging Memories S Hamdioui, M Fieback, S Nagarajan, M Taouil 2019 IEEE International Test Conference (ITC), 1-10, 2019 | 20 | 2019 |
Testing Scouting Logic-Based Computation-in-Memory Architectures M Fieback, S Nagarajan, R Bishnoi, M Tahoori, M Taouil, S Hamdioui 2020 IEEE European Test Symposium (ETS), 1-6, 2020 | 18 | 2020 |
Review of manufacturing process defects and their effects on memristive devices LMB Poehls, MCR Fieback, S Hoffmann-Eifert, T Copetti, E Brum, ... Journal of electronic testing 37, 427-437, 2021 | 14 | 2021 |
Multi-level control of resistive ram (Rram) using a write termination to achieve 4 bits/cell in high resistance state H Aziza, S Hamdioui, M Fieback, M Taouil, M Moreau, P Girard, A Virazel, ... Electronics 10 (18), 2222, 2021 | 14 | 2021 |
An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs) H Aziza, M Moreau, M Fieback, M Taouil, S Hamdioui IEEE Access 8, 137263-137274, 2020 | 14 | 2020 |
DFT Scheme for Hard-to-Detect Faults in FinFET SRAMs GC Medeiros, M Taouil, M Fieback, LB Poehls, S Hamdioui 2019 IEEE European Test Symposium (ETS), 1-2, 2019 | 14 | 2019 |
Special Session–Emerging Memristor Based Memory and CIM Architecture: Test, Repair and Yield Analysis R Bishnoi, L Wu, M Fieback, C Münch, SM Nair, M Tahoori, Y Wang, H Li, ... 2020 IEEE 38th VLSI Test Symposium (VTS), 1-10, 2020 | 12 | 2020 |
Accelerating RRAM Testing with a Low-cost Computation-in-Memory based DFT A Singh, M Fieback, R Bishnoi, F Bradarić, A Gebregiorgis, RV Joshi, ... 2022 IEEE International Test Conference (ITC), 400-409, 2022 | 10 | 2022 |
Hard-to-detect fault analysis in finfet srams GC Medeiros, M Fieback, L Wu, M Taouil, LMB Poehls, S Hamdioui IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (6 …, 2021 | 10 | 2021 |
Recent trends and perspectives on defect-oriented testing P Bernardi, R Cantoro, A Coyette, W Dobbeleare, M Fieback, A Floridia, ... 2022 IEEE 28th International Symposium on On-Line Testing and Robust System …, 2022 | 9 | 2022 |
Density Enhancement of RRAMs using a RESET Write Termination for MLC Operation H Aziza, S Hamdioui, M Fieback, M Taouil, M Moreau 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 9 | 2021 |
Rebooting Computing: The Challenges for Test and Reliability A Bosio, I O'Connor, GS Rodrigues, FK Lima, EI Vatajelu, G Di Natale, ... 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2019 | 9 | 2019 |
Evaluating the Impact of Process Variation on RRAMs E Brum, M Fieback, TS Copetti, H Jiayi, S Hamdioui, F Vargas, ... 2021 IEEE 22nd Latin American Test Symposium (LATS), 1-6, 2021 | 8 | 2021 |
DRAM Reliability: Aging Analysis and Reliability Prediction Model M Fieback | 7 | 2017 |
A DFT Scheme to Improve Coverage of Hard-to-Detect Faults in FinFET SRAMs GC Medeiros, CC Gürsoy, L Wu, M Fieback, M Jenihhin, M Taouil, ... 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 792-797, 2020 | 6 | 2020 |