| Efficient co-planar adder designs in quantum dot cellular automata: Energy and cost optimization with crossover elimination H Chugh, S Singh Integration 94, 102103, 2024 | 4 | 2024 |
| Design and implementation of a high-Performance 4-bit vedic multiplier using a novel 5-bit adder in 90nm technology H Chugh, S Singh 2022 10th International Conference on Reliability, Infocom Technologies and …, 2022 | 4 | 2022 |
| Machine learning applications in rational drug discovery H Chugh, S Singh Drug Design Using Machine Learning, 97-116, 2022 | 3 | 2022 |
| Parametrical Analysis and Thermal Sensitivity Study of 8-bit Vedic Multiplier H Chugh, S Singh 2023 14th International Conference on Computing Communication and Networking …, 2023 | 1 | 2023 |
| A Novel Cost-efficient Parallel Binary Adder without Crossover in QCA with Energy Dissipation Analysis H Chugh, S Singh | 1 | 2023 |
| Efficient quantum-dot adder optimisation and analysis for future circuits H Chugh, S Singh International Journal of Electronics, 1-21, 2024 | | 2024 |
| Systematic exploration of N-Bit Vedic multipliers: A roadmap of technological approaches in pursuit of future trends H Chugh, S Singh Nano Communication Networks, 100529, 2024 | | 2024 |
| FPGA Based Sensor System for Biomedical Monitoring Using I2C and UART Protocol H Chugh | | 2021 |
| FPGA Sensor System For Biomedical Monitoring Using I2C and UART Protocol H Chugh National Conference on Electronics, Communication and Computation, 2020 | | 2020 |
| Various types of multipliers and their implementation on FPGA H Chugh journal of emerging technologies and innovative research 6 (6), 1066-1070, 2019 | | 2019 |
| “Design and Implementation of Speed Efficient Vedic Multiplier using Verilog.“ R Payal, U Kapoor, H Chugh International Journal Of Scientific Research And Education 3 (12), 4752-4758, 2015 | | 2015 |
