A 12-bit intrinsic accuracy high-speed CMOS DAC J Bastos, AM Marques, MSJ Steyaert, W Sansen IEEE Journal of Solid-State Circuits 33 (12), 1959-1969, 1998 | 474 | 1998 |
A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range V Peluso, P Vancorenland, AM Marques, MSJ Steyaert, W Sansen IEEE Journal of Solid-State Circuits 33 (12), 1887-1897, 1998 | 306 | 1998 |
Optimal parameters for ΔΣ modulator topologies A Marques, V Peluso, MS Steyaert, WM Sansen IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1998 | 254 | 1998 |
A 15-b resolution 2-MHz Nyquist rate ΔΣ ADC in a 1-μm CMOS technology AM Marques, V Peluso, MSJ Steyaert, W Sansen IEEE Journal of Solid-State Circuits 33 (7), 1065-1075, 1998 | 133* | 1998 |
A 6-bit 1 GHz acquisition speed CMOS flash ADC with digital error correction K Uyttenhove, A Marques, M Steyaert Custom Integrated Circuits Conference, 2000. CICC. Proceedings of the IEEE …, 2000 | 74 | 2000 |
A 12 bit 200 MHz low glitch CMOS D/A converter A Van den Bosch, M Borremans, J Vandenbussche, G Van der Plas, ... Custom Integrated Circuits Conference, 1998. Proceedings of the IEEE 1998 …, 1998 | 62 | 1998 |
Partitioning of radio-frequency apparatus J Maligeorgos, AM Marques, L Lim, GT Tuttle, AA Rafi, T Paulus, ... US Patent 7,221,921, 2007 | 55 | 2007 |
A 12 b accuracy 300 Msample/s update rate CMOS DAC A Marques, J Bastos, A Van den Bosch, J Vandenbussche, M Steyaert, ... Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE …, 1998 | 50 | 1998 |
A 900 mV 40/spl mu/W switched opamp/spl Delta//spl Sigma/modulator with 77 dB dynamic range V Peluso, P Vancorenland, A Marques, M Steyaert, W Sansen Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE …, 1998 | 50 | 1998 |
Capacitor array segmentation JP Maligeorgos, DA Kerth, AM Marques US Patent 7,280,001, 2007 | 49 | 2007 |
Magnetically differential inductors and associated methods A Marques US Patent App. 11/094,834, 2005 | 46 | 2005 |
Partitioning of radio-frequency apparatus J Maligeorgos, AM Marques, L Lim, GT Tuttle, AA Rafi, T Paulus, ... US Patent 7,242,912, 2007 | 38 | 2007 |
High speed CMOS data converters A Marques | 32 | 1999 |
Quasi non-volatile memory for use in a receiver DA Kerth, BD Green, AM Marques US Patent 7,979,048, 2011 | 31 | 2011 |
Settling time analysis of third order systems A Marques, Y Geerts, M Steyaert, W Sansen Electronics, Circuits and Systems, 1998 IEEE International Conference on 2 …, 1998 | 30 | 1998 |
Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters A Marques, V Peluso, M Steyaert, W Sansen Electronics, Circuits and Systems, 1998 IEEE International Conference on 2 …, 1998 | 29 | 1998 |
Controlling the frequency of an oscillator DA Kerth, JP Maligeorgos, DA Hester, L Lim, AM Marques, GT Tuttle US Patent 7,689,190, 2010 | 24 | 2010 |
Clock generating apparatus and frequency calibrating method of the clock generating apparatus X Guo, WC Lee, CH Chen, A Marques US Patent 8,570,107, 2013 | 23 | 2013 |
Controlled oscillator AM Marques, SD Willingham US Patent 7,230,504, 2007 | 22 | 2007 |
Optimal parameters for single loop ΔΣ modulators V Peluso, A Marques, M Steyaert, W Sansen Circuits and Systems, 1997. ISCAS'97., Proceedings of 1997 IEEE …, 1997 | 20 | 1997 |