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Salvatore Mario Carta
Salvatore Mario Carta
University of Cagliari - Dipartimento di Matematica e Informatica
在 unica.it 的电子邮件经过验证 - 首页
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Dissecting Ponzi schemes on Ethereum: identification, analysis, and impact
M Bartoletti, S Carta, T Cimoli, R Saia
Future Generation Computer Systems 102, 259-277, 2020
4292020
Designing application-specific networks on chips with floorplan information
S Murali, P Meloni, F Angiolini, D Atienza, S Carta, L Benini, G De Micheli, ...
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006
2572006
State-of-the-art in group recommendation and new approaches for automatic identification of groups
L Boratto, S Carta
Information retrieval and mining in distributed environments, 1-20, 2011
2462011
× pipes lite: A synthesis oriented design library for networks on chips
S Stergiou, F Angiolini, S Carta, L Raffo, D Bertozzi, GD Micheli
Proceedings of the conference on Design, Automation and Test in Europe …, 2005
1892005
Deep learning and time series-to-image encoding for financial forecasting
S Barra, SM Carta, A Corriga, AS Podda, DR Recupero
IEEE/CAA Journal of Automatica Sinica 7 (3), 683-692, 2020
1802020
Multi-DQN: An ensemble of Deep Q-learning agents for stock market forecasting
S Carta, A Ferreira, AS Podda, DR Recupero, A Sanna
Expert systems with applications 164, 113820, 2021
1792021
Contrasting a NoC and a traditional interconnect fabric with layout awareness
F Angiolini, P Meloni, S Carta, L Benini, L Raffo
Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006
1272006
A multi-layer and multi-ensemble stock trader using deep learning and deep reinforcement learning
S Carta, A Corriga, A Ferreira, AS Podda, DR Recupero
Applied Intelligence 51, 889-905, 2021
1132021
Fraud detection for E-commerce transactions by employing a prudential Multiple Consensus model
S Carta, G Fenu, DR Recupero, R Saia
Journal of Information Security and Applications 46, 13-22, 2019
932019
A layout-aware analysis of networks-on-chip and traditional interconnects for MPSoCs
F Angiolini, P Meloni, SM Carta, L Raffo, L Benini
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007
842007
Thermal balancing policy for multiprocessor stream computing platforms
F Mulas, D Atienza, A Acquaviva, S Carta, L Benini, G De Micheli
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009
802009
Group recommendation with automatic identification of users communities
L Boratto, S Carta, A Chessa, M Agelli, ML Clemente
2009 IEEE/WIC/ACM International Joint Conference on Web Intelligence and …, 2009
732009
Thermal balancing policy for streaming computing on multiprocessor architectures
F Mulas, M Pittau, M Buttu, S Carta, A Acquaviva, L Benini, D Atienza
Proceedings of the conference on Design, automation and test in Europe, 734-739, 2008
722008
Assistive conversational agent for health coaching: a validation study
A Fadhil, Y Wang, H Reiterer
Methods of information in medicine 58 (01), 009-023, 2019
712019
Assessing task migration impact on embedded soft real-time streaming multimedia applications
A Acquaviva, A Alimonda, S Carta, M Pittau
EURASIP journal on embedded systems 2008, 1-15, 2007
702007
Explainable machine learning exploiting news and domain-specific lexicon for stock market forecasting
SM Carta, S Consoli, L Piras, AS Podda, DR Recupero
IEEE Access 9, 30193-30205, 2021
672021
A feedback-based approach to dvfs in data-flow applications
A Alimonda, S Carta, A Acquaviva, A Pisano, L Benini
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009
612009
Discovery and representation of the preferences of automatically detected groups: Exploiting the link between group modeling and clustering
L Boratto, S Carta, G Fenu
Future Generation Computer Systems 64, 165-174, 2016
602016
Forecasting e-commerce products prices by combining an autoregressive integrated moving average (ARIMA) model and google trends data
S Carta, A Medda, A Pili, D Reforgiato Recupero, R Saia
Future Internet 11 (1), 5, 2018
592018
Synthesis of predictable networks-on-chip-based interconnect architectures for chip multiprocessors
S Murali, D Atienza, P Meloni, S Carta, L Benini, G De Micheli, L Raffo
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (8), 869-880, 2007
592007
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