Estimation of process variation impact on DG-FinFET device performance using Plackett-Burman design of experiment method AN Chandorkar, S Mande, H Iwai 2008 9th International Conference on Solid-State and Integrated-Circuit …, 2008 | 16 | 2008 |
Design and optimization of microstrip hairpin-line bandpass filter using DOE methodology T Singh, J Chacko, N Sebastian, R Thoppilan, A Kotrashetti, S Mande 2012 International Conference on Communication, Information & Computing …, 2012 | 15 | 2012 |
Near real time-sensing system for hydroponics based urban farming N Jai, B Dontha, A Tripathy, SS Mande 2018 3rd International Conference for Convergence in Technology (I2CT), 1-5, 2018 | 14 | 2018 |
Investigation of suitable DSP architecture for efficient FPGA implementation of FIR filter M Kadam, K Sawarkar, S Mande 2015 International Conference on Communication, Information & Computing …, 2015 | 9 | 2015 |
4-Bit 4GS/s differential current steering DAC for 16-bit PAM transmitter in 45-nm CMOS technology. Appl Nanosci (2022) V Soman, SS Mande, KA Vijayakumar | 9 | |
A 4-Bit 4GS/s differential current steering DAC for 16-bit PAM transmitter in 45-nm CMOS technology V Soman, SS Mande, K Vijayakumar Applied Nanoscience 13 (3), 1959-1970, 2023 | 8 | 2023 |
Computationally efficient methodology for statistical characterization and yield estimation due to inter-and intra-die process variations SS Mande, AN Chandorkar, H Iwai Fifth Asia Symposium on Quality Electronic Design (ASQED 2013), 287-294, 2013 | 8 | 2013 |
A novel approach to link process parameters to bsim model parameters S Mande, AN Chandorkar, C Hsaio, K Huang, YM Sheu, S Liu IEEE transactions on semiconductor manufacturing 22 (4), 544-551, 2009 | 8 | 2009 |
Response surface methodology for statistical characterization of nano CMOS devices and circuits S Mande, AN Chandorkar 2007 International Workshop on Physics of Semiconductor Devices, 297-300, 2007 | 8 | 2007 |
Process variation aware dual-Vth assignment technique for low power nanoscale CMOS design SS Mande, SA Chandorkar, AN Chandorkar Microelectronics Reliability 51 (12), 2357-2365, 2011 | 7 | 2011 |
Design of a two-stage folded cascode amplifier using scl 180 nm cmos technology V Soman, SS Mande International Conference on Communication, Computing and Electronics Systems …, 2020 | 5 | 2020 |
Design and implementation of hardware firewall using FPGA SM Keni, S Mande 2018 3rd International Conference for Convergence in Technology (I2CT), 1-4, 2018 | 4 | 2018 |
Analysis of various adder circuits in deep submicron process SS Aphale, K Fakir, S Kodagali, SS Mande 2016 International Conference on Automatic Control and Dynamic Optimization …, 2016 | 2 | 2016 |
Analyzing the Effect of Different ObjectiveFunctions on Energy Efficiency for RPL-basedRouting in Low Power Lossy Networks for IoTapplication A Telgote, S Mande | 1 | 2023 |
Effect of IEEE 802.15. 4 MAC Layer on Energy Consumption for Routing Protocol for Low Power Lossy Networks (RPL) A Telgote, S Mande Intelligent Systems and Human Machine Collaboration: Select Proceedings of …, 2023 | 1 | 2023 |
Design of Ultra Low Noise High Precision Bandgap Voltage Reference S Warang, M Gracious, S More, M Patil, SS Mande 2021 International Conference on Smart Generation Computing, Communication …, 2021 | 1 | 2021 |
Switchable Single/dual Notch Band Electromagnetic Band Gap Structure DS Bade, SS Mande 2021 International Conference on Communication Information and Computing …, 2021 | 1 | 2021 |
Low Power SAR-ADC Using 180nm CMOS Technology S Naik, B Patel, C Poojary, S Mande International Journal of Research in Engineering, Science and Management 3 …, 2020 | 1 | 2020 |
Packet filtering for IPV4 protocol using FPGA SM Keni, S Mande 2018 Second International Conference on Intelligent Computing and Control …, 2018 | 1 | 2018 |
Variability aware performance evaluation of low power sram cell H Dsilva, J Pinto, A Elchidana, S Mande Fifth Asia Symposium on Quality Electronic Design (ASQED 2013), 183-187, 2013 | 1 | 2013 |