| BDD-based synthesis of optical logic circuits exploiting wavelength division multiplexing R Matsuo, J Shiomi, T Ishihara, H Onodera, A Shinya, M Notomi Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019 | 11 | 2019 |
| A synthesis method for power-efficient integrated optical logic circuits towards light speed processing R Matsuo, J Shiomi, T Ishihara, H Onodera, A Shinya, M Notomi 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 488-493, 2020 | 6 | 2020 |
| BDD variable ordering for minimizing power consumption of optical logic circuits R Matsuo, S Minato 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 96-101, 2021 | 3 | 2021 |
| Methods for reducing power and area of BDD-based optical logic circuits R Matsuo, J Shiomi, T Ishihara, H Onodera, A Shinya, M Notomi IEICE Transactions on Fundamentals of Electronics, Communications and …, 2019 | 3 | 2019 |
| Optimizing Decision Diagrams for Measurements of Quantum Circuits R Matsuo, R Raymond, S Yamashita, SI Minato 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 134-139, 2024 | 2 | 2024 |
| Space and power reduction in BDD-based optical logic circuits exploiting dual ports R Matsuo, S Minato 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2022 | 2 | 2022 |
| A synthesis method based on multi-stage optimization for power-efficient integrated optical logic circuits R Matsuo, J Shiomi, T Ishihara, H Onodera, A Shinya, M Notomi IEICE Transactions on Fundamentals of Electronics, Communications and …, 2021 | 2 | 2021 |
| A Complete Library of Cross-Bar Gate Logic with Three Control Inputs R Matsuo, SI Minato IEICE Transactions on Fundamentals of Electronics, Communications and …, 2024 | | 2024 |
| SPulseGen: Succinct pulse generator architecture maximizing gate fidelity for superconducting quantum computers R Matsuo, K Ogawa, H Shiomi, M Negoro, T Miyoshi, M Shintani, ... arXiv preprint arXiv:2312.08699, 2023 | | 2023 |
| Studies on Synthesis Methods for Efficient Optical Logic Circuits R Matsuo Kyoto University, 2023 | | 2023 |
| Variable Ordering for Minimizing Power Consumption of BDD-based Optical Logic Circuits R Matsuo, S Minato IEICE Technical Report; IEICE Tech. Rep. 120 (234), 78-83, 2020 | | 2020 |
| Energy Efficient Computing via Dynamic Voltage Scaling and In-Network Optical Processing R Matsuo, J Shiomi, Y Masuda, T Ishihara | | |
