| A deeper look into rowhammer’s sensitivities: Experimental analysis of real dram chips and implications on future attacks and defenses L Orosa, AG Yaglikci, H Luo, A Olgun, J Park, H Hassan, M Patel, JS Kim, ... MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 78 | 2021 |
| QUAC-TRNG: High-throughput true random number generation using quadruple row activation in commodity DRAM chips A Olgun, M Patel, AG Yağlıkçı, H Luo, JS Kim, FN Bostancı, N Vijaykumar, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 67 | 2021 |
| CLR-DRAM: A low-cost DRAM architecture enabling dynamic capacity-latency trade-off H Luo, T Shahroodi, H Hassan, M Patel, AG Yağlıkçı, L Orosa, J Park, ... 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020 | 53 | 2020 |
| Understanding RowHammer Under Reduced Wordline Voltage: An Experimental Study Using Real DRAM Devices AG Yağlıkçı, H Luo, GF De Oliviera, A Olgun, M Patel, J Park, H Hassan, ... 2022 52nd Annual IEEE/IFIP International Conference on Dependable Systems …, 2022 | 43 | 2022 |
| RowPress: Amplifying Read Disturbance in Modern DRAM Chips H Luo, A Olgun, AG Yağlıkçı, YC Tuğrul, S Rhyner, MB Cavlak, ... Proceedings of the 50th Annual International Symposium on Computer …, 2023 | 38 | 2023 |
| HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips AG Yağlikçi, A Olgun, M Patel, H Luo, H Hassan, L Orosa, O Ergin, ... 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 815-834, 2022 | 37 | 2022 |
| HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips AG Yağlıkçı, A Olgun, M Patel, H Luo, H Hassan, L Orosa, O Ergin, ... arXiv preprint arXiv:2209.10198, 2022 | 37* | 2022 |
| HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips Y Giray, A Olgun, M Patel, H Luo, H Hassan, O Ergin, O Mutlu Proceedings of the Annual International Symposium on Microarchitecture, MICRO, 2022 | 37 | 2022 |
| CODIC: A low-cost substrate for enabling custom in-DRAM functionalities and optimizations L Orosa, Y Wang, M Sadrosadati, JS Kim, M Patel, I Puddu, H Luo, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 34 | 2021 |
| DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips A Olgun, H Hassan, AG Yağlıkçı, YC Tuğrul, L Orosa, H Luo, M Patel, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 | 22 | 2023 |
| SpyHammer: Using RowHammer to Remotely Spy on Temperature L Orosa, U Rührmair, AG Yaglikci, H Luo, A Olgun, P Jattke, M Patel, ... arXiv preprint arXiv:2210.04084, 2022 | 20 | 2022 |
| An experimental analysis of rowhammer in hbm2 dram chips A Olgun, M Osseiran, AG Yağlıkçı, YC Tuğrul, H Luo, S Rhyner, B Salami, ... 2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems …, 2023 | 17 | 2023 |
| A Case for Transparent Reliability in DRAM Systems M Patel, T Shahroodi, A Manglik, AG Yaglikci, A Olgun, H Luo, O Mutlu arXiv preprint arXiv:2204.10378, 2022 | 14 | 2022 |
| A Case for Self-Managing DRAM Chips: Improving Performance, Efficiency, Reliability, and Security via Autonomous in-DRAM Maintenance Operations H Hassan, A Olgun, AG Yaglikci, H Luo, O Mutlu arXiv preprint arXiv:2207.13358, 2022 | 12 | 2022 |
| ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation A Olgun, YC Tugrul, N Bostanci, IE Yuksel, H Luo, S Rhyner, AG Yaglikci, ... arXiv preprint arXiv:2310.09977, 2023 | 9 | 2023 |
| PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips IE Yuksel, YC Tugrul, F Bostanci, AG Yaglikci, A Olgun, GF Oliveira, ... arXiv preprint arXiv:2312.02880, 2023 | 5 | 2023 |
| Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator H Luo, YC Tu, FN Bostancı, A Olgun, AG Ya, O Mutlu IEEE Computer Architecture Letters, 2023 | 4 | 2023 |
| Understanding Read Disturbance in High Bandwidth Memory: An Experimental Analysis of Real HBM2 DRAM Chips A Olgun, M Osseiran, AG Yaglikci, YC Tugrul, H Luo, S Rhyner, B Salami, ... arXiv preprint arXiv:2310.14665, 2023 | 2 | 2023 |
| Rethinking the Producer-Consumer Relationship in Modern DRAM-Based Systems M Patel, T Shahroodi, A Manglik, AG Yağlıkçı, A Olgun, H Luo, O Mutlu arXiv preprint arXiv:2401.16279, 2024 | | 2024 |
| HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips A Giray Yağlıkçı, A Olgun, M Patel, H Luo, H Hassan, L Orosa, O Ergin, ... arXiv e-prints, arXiv: 2209.10198, 2022 | | 2022 |
