| A suite of IEEE 1687 benchmark networks A Tšertov, A Jutman, S Devadze, MS Reorda, E Larsson, FG Zadegan, ... 2016 IEEE International Test Conference (ITC), 1-10, 2016 | 54 | 2016 |
| Parallel X-fault simulation with critical path tracing technique R Ubar, S Devadze, J Raik, A Jutman 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 49 | 2010 |
| Effective scalable IEEE 1687 instrumentation network for fault management A Jutman, S Devadze, K Shibin IEEE Design & Test 30 (5), 26-35, 2013 | 37 | 2013 |
| Design, verification, and application of IEEE 1687 FG Zadegan, E Larsson, A Jutman, S Devadze, R Krenz-Baath 2014 IEEE 23rd Asian Test Symposium, 93-100, 2014 | 34 | 2014 |
| Fast extended test access via JTAG and FPGAs S Devadze, A Jutman, I Aleksejev, R Ubar 2009 International Test Conference, 1-7, 2009 | 26 | 2009 |
| Ultra fast parallel fault analysis on structurally synthesized bdds R Ubar, S Devadze, J Raik, A Jutman 12th IEEE European Test Symposium (ETS'07), 131-136, 2007 | 25 | 2007 |
| FPGA-based synthetic instrumentation for board test I Aleksejev, A Jutman, S Devadze, S Odintsov, T Wenzel 2012 IEEE International Test Conference, 1-10, 2012 | 23 | 2012 |
| Fault simulation with parallel exact critical path tracing in multiple core environment M Gorev, R Ubar, S Devadze 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015 | 22 | 2015 |
| Asynchronous fault detection in IEEE P1687 instrument network K Shibin, S Devadze, A Jutman 2014 IEEE 23rd North Atlantic Test Workshop, 73-78, 2014 | 21 | 2014 |
| Fast Fault Simulation for Extended Class of Faults in Scan Path Circuits R Ubar, S Devadze, J Raik, A Jutman 2010 Fifth IEEE International Symposium on Electronic Design, Test …, 2010 | 20 | 2010 |
| Health management for self-aware socs based on ieee 1687 infrastructure K Shibin, S Devadze, A Jutman, M Grabmann, R Pricken IEEE Design & Test 34 (6), 27-35, 2017 | 17 | 2017 |
| Reliable health monitoring and fault management infrastructure based on embedded instrumentation and IEEE 1687 A Jutman, K Shibin, S Devadze 2016 IEEE AUTOTESTCON, 1-10, 2016 | 16 | 2016 |
| On-line fault classification and handling in IEEE1687 based fault management system for complex SoCs K Shibin, S Devadze, A Jutman 2016 17th Latin-American Test Symposium (LATS), 69-74, 2016 | 16 | 2016 |
| Parallel fault backtracing for calculation of fault coverage R Ubar, S Devadze, J Raik, A Jutman 2008 Asia and South Pacific Design Automation Conference, 667-672, 2008 | 15 | 2008 |
| System and method for optimized board test and configuration S Devadze, A Jutman, I Aleksejev, K Shibin, T Wenzel US Patent 9,164,858, 2015 | 14 | 2015 |
| System-wide fault management based on IEEE P1687 IJTAG A Jutman, S Devadze, J Aleksejev 6th International Workshop on Reconfigurable Communication-Centric Systems …, 2011 | 12 | 2011 |
| Hierarchical calculation of malicious faults for evaluating the fault-tolerance R Ubar, S Devadze, M Jenihhin, J Raik, G Jervan, P Ellervee 4th IEEE International Symposium on Electronic Design, Test and Applications …, 2008 | 12 | 2008 |
| Fault Simulation with Parallel Critical Path Tracing for Combinatorial Circuits Using Structurally Synthesized BDDs. S Devadze, J Raik, A Jutman, R Ubar LATW, 97-102, 2006 | 12 | 2006 |
| Teaching Digital RT-Level Self-Test Using a Java Applet S Devadze, A Jutman, A Sudnitson, R Ubar, HD Wuttke 20th IEEE Conference NORCHIP, 11-12, 2002 | 12 | 2002 |
| Combinational fault simulation in sequential circuits R Ubar, J Kõusaar, M Gorev, S Devadze 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2876-2879, 2015 | 11 | 2015 |
