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Suveg V Iyer
Suveg V Iyer
Research Scholar, Mechanical Engineering Department, BITS Pilani
在 pilani.bits-pilani.ac.in 的电子邮件经过验证
标题
引用次数
引用次数
年份
Digitalization: a tool for the successful long-term adoption of lean manufacturing
SV Iyer, KS Sangwan
Procedia CIRP 116, 245-250, 2023
102023
Development of an Industrial Symbiosis Framework through Digitalization in the Context of Industry 4.0
SV Iyer, KS Sangwan
Procedia CIRP 122, 515-520, 2024
12024
Evolution of Digital Twin in Manufacturing Application: Definition, Architecture, Applications, and Tools
SV Iyer, KS Sangwan, Dhiraj
Industry 4.0 Driven Manufacturing Technologies, 1-36, 2024
2024
Digital twin‐based virtual commissioning for evaluation and validation of a reconfigurable process line
SV Iyer, KS Sangwan, Dhiraj
IET Collaborative Intelligent Manufacturing 6 (3), e12111, 2024
2024
A cognitive digital twin for process chain anomaly detection and bottleneck analysis
SV Iyer, KS Sangwan, Dhiraj
Journal of Industrial and Production Engineering, 1-23, 2024
2024
Federated Interoperable Digital Twins for Collaborative Learning Factories
SV Iyer, KS Sangwan, Dhiraj
Conference on Learning Factories, 137-144, 2024
2024
Data-driven Model for CMM Probe Calibration to Enhance Efficiency and Sustainability
S Kugunavar, SV Iyer, KS Sangwan, TC Bera
Procedia CIRP 122, 885-890, 2024
2024
Design and Programming of an Integrated Automation of Lift Irrigation Pumping Station
SV Iyer
i-Manager's Journal on Instrumentation & Control Engineering 4 (3), 21, 2016
2016
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