| Attacks on cryptosystems implemented via VLSI: A review MM Sravani, SA Durai Journal of Information Security and Applications 60, 102861, 2021 | 18 | 2021 |
| On efficiency enhancement of SHA-3 for FPGA-Based multimodal biometric authentication MM Sravani, SA Durai IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (4), 488-501, 2022 | 11 | 2022 |
| Side-Channel Attacks on Cryptographic Devices and Their Countermeasures—A Review MM Sravani, SA Durai Smart Innovations in Communication and Computational Sciences 851, 209-226, 2018 | 7 | 2018 |
| FPGA Implementation of Masked-AE $ HA-2 for Digital Signature Application MM Sravani, SA Durai, M Prathyusha Reddy, G Sowjanya, N Ahmad Algorithms for Intelligent Systems, 469-483, 2022 | 2 | 2022 |
| Design of compact implementation of SHA-3 (512) on FPGA MM Sravani, CH Pallavi Int. Res. J. Eng. Technol 2 (02), 41-46, 2015 | 2 | 2015 |
| FPGA implementation of novel hybrid hash function SHѦES for digital signatures MM Sravani, AD Sundarajan, N Ahmad AIP Conference Proceedings 2564 (1), 2023 | 1 | 2023 |
| Bio-Hash Secured Hardware e-Health Record System MM Sravani, SA Durai IEEE Transactions on Biomedical Circuits and Systems 17 (3), 420-432, 2023 | 1 | 2023 |
| Architectural Enhancement of Network on Chip SAD Senthil Athiban M, Mehazin Shaju, M M Sravani International Journal of Engineering and Advanced Technology (IJEAT) 9 (1S3 …, 2020 | | 2020 |
| Survey on Countermeasure Techniques for Side Channel Attacks on VLSI Cryptographic Devices DKH M. M. Sravani , Dr. S. Ananiah Durai 1st International Symposium on Artificial Intelligence and Computer Vision 1 …, 2018 | | 2018 |
| Architectural Enhancement of Network on Chip M Senthil Athiban, M Shaju, MM Sravani, SA Durai | | |
Ananiah Durai SundararajanVIT UNIVERSITY, CHENNAI CAMPUS在 vit.ac.in 的电子邮件经过验证
Ananiah Durai SundararajanVIT UNIVERSITY, CHENNAI CAMPUS在 vit.ac.in 的电子邮件经过验证
Ch.PallaviAssistant Professor (Ph.D.)在 svcolleges.edu.in 的电子邮件经过验证