| Automated layout for integrated circuits with nonstandard cells R Manohar, R Karmazin, CTO Otero US Patent 9,852,253, 2017 | 85 | 2017 |
| A split-foundry asynchronous FPGA B Hill, R Karmazin, CTO Otero, J Tse, R Manohar Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 1-4, 2013 | 48 | 2013 |
| celltk: Automated layout for asynchronous circuits with nonstandard cells R Karmazin, CTO Otero, R Manohar 2013 IEEE 19th International Symposium on Asynchronous Circuits and Systems …, 2013 | 39 | 2013 |
| Automatic obfuscated cell layout for trusted split-foundry design CTO Otero, J Tse, R Karmazin, B Hill, R Manohar 2015 IEEE International Symposium on Hardware Oriented Security and Trust …, 2015 | 32 | 2015 |
| Neural spiking dynamics in asynchronous digital circuits N Imam, K Wecker, J Tse, R Karmazin, R Manohar The 2013 International Joint Conference on Neural Networks (IJCNN), 1-8, 2013 | 20 | 2013 |
| ULSNAP: An ultra-low power event-driven microcontroller for sensor network nodes CTO Otero, J Tse, R Karmazin, B Hill, R Manohar Fifteenth International Symposium on Quality Electronic Design, 667-674, 2014 | 18 | 2014 |
| Timing driven placement for quasi delay-insensitive circuits R Karmazin, S Longfield, CTO Otero, R Manohar 2015 21st IEEE International Symposium on Asynchronous Circuits and Systems …, 2015 | 14 | 2015 |
| Overcoming single-thread performance hurdles in the Core Fusion reconfigurable multicore architecture J Mukundan, S Ghose, R Karmazin, E Ipek, JF Martínez Proceedings of the 26th ACM international conference on Supercomputing, 101-110, 2012 | 5 | 2012 |
Carlos Tadeo Ortega OteroIBM在 us.ibm.com 的电子邮件经过验证
