A review of the pseudo-MOS transistor in SOI wafers: operation, parameter extraction, and applications S Cristoloveanu, D Munteanu, MST Liu IEEE Transactions on Electron Devices 47 (5), 1018-1027, 2000 | 259 | 2000 |
Modeling and simulation of single-event effects in digital devices and ICs D Munteanu, JL Autran IEEE Transactions on Nuclear science 55 (4), 1854-1878, 2008 | 196 | 2008 |
Technology downscaling worsening radiation effects in bulk: SOI to the rescue P Roche, JL Autran, G Gasiot, D Munteanu 2013 IEEE International Electron Devices Meeting, 31.1. 1-31.1. 4, 2013 | 151 | 2013 |
Influence of band-structure on electron ballistic transport in Silicon nanowire MOSFET's: an atomistic study K Nehari, N Cavassilas, JL Autran, M Bescond, D Munteanu, M Lannoo Proceedings of 35th European Solid-State Device Research Conference, 2005 …, 2005 | 145 | 2005 |
Two-dimensional modeling of quantum ballistic transport in ultimate double-gate SOI devices D Munteanu, JL Autran Solid-State Electronics 47 (7), 1219-1225, 2003 | 113 | 2003 |
Quantum short-channel compact modelling of drain-current in double-gate MOSFET D Munteanu, JL Autran, X Loussier, S Harrison, R Cerutti, T Skotnicki Solid-State Electronics 50 (4), 680-686, 2006 | 106 | 2006 |
Strained FDSOI CMOS technology scalability down to 2.5nm film thickness and 18nm gate length with a TiN/HfO2gate stack V Barral, T Poiroux, F Andrieu, C Buj-Dufournet, O Faynot, T Ernst, ... 2007 IEEE International Electron Devices Meeting, 61-64, 2007 | 99 | 2007 |
Soft Errors: from particles to circuits JL Autran, D Munteanu CRC press, 2017 | 96 | 2017 |
Scaling of high-κ/metal-gate TriGate SOI nanowire transistors down to 10 nm width R Coquand, S Barraud, M Cassé, P Leroux, C Vizioz, C Comboroure, ... Solid-State Electronics 88, 32-36, 2013 | 84 | 2013 |
Generation-recombination transient effects in partially depleted SOI transistors: Systematic experiments and simulations D Munteanu, DA Weiser, S Cristoloveanu, O Faynot, JL Pelloie, ... IEEE Transactions on Electron Devices 45 (8), 1678-1683, 1998 | 82 | 1998 |
3D quantum modeling and simulation of multiple-gate nanowire MOSFETs M Bescond, K Nehari, JL Autran, N Cavassilas, D Munteanu, M Lannoo IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004 | 80 | 2004 |
Altitude and underground real-time SER characterization of CMOS 65 nm SRAM JL Autran, P Roche, S Sauze, G Gasiot, D Munteanu, P Loaiza, ... IEEE Transactions on Nuclear Science 56 (4), 2258-2266, 2009 | 75 | 2009 |
Highly performant double gate MOSFET realized with SON process S Harrison, P Coronel, F Leverd, R Cerutti, R Palla, D Delille, S Borel, ... IEEE International Electron Devices Meeting 2003, 18.6. 1-18.6. 4, 2003 | 67 | 2003 |
Experimental investigation on the quasi-ballistic transport: Part II—Backscattering coefficient extraction and link with the mobility V Barral, T Poiroux, D Munteanu, JL Autran, S Deleonibus IEEE transactions on electron devices 56 (3), 420-430, 2009 | 61 | 2009 |
Experimental investigation on the quasi-ballistic transport: Part I—Determination of a new backscattering coefficient extraction methodology V Barral, T Poiroux, J Saint-Martin, D Munteanu, JL Autran, S Deleonibus IEEE Transactions on Electron Devices 56 (3), 408-419, 2009 | 57 | 2009 |
Soft-error rate induced by thermal and low energy neutrons in 40 nm SRAMs JL Autran, S Serre, S Semikh, D Munteanu, G Gasiot, P Roche IEEE Transactions on Nuclear Science 59 (6), 2658-2665, 2012 | 54 | 2012 |
Atomic-scale modeling of double-gate MOSFETs using a tight-binding Green’s function formalism M Bescond, JL Autran, D Munteanu, M Lannoo Solid-State Electronics 48 (4), 567-574, 2004 | 53 | 2004 |
Soft-errors induced by terrestrial neutrons and natural alpha-particle emitters in advanced memory circuits at ground level JL Autran, D Munteanu, P Roche, G Gasiot, S Martinie, S Uznanski, ... Microelectronics Reliability 50 (9-11), 1822-1831, 2010 | 52 | 2010 |
Simulation analysis of the bipolar amplification in fully-depleted SOI technologies under heavy-ion irradiations K Castellani-Coulié, D Munteanu, V Ferlet-Cavrois, JL Autran IEEE transactions on nuclear science 52 (5), 1474-1479, 2005 | 51 | 2005 |
Real-time soft-error rate measurements: A review JL Autran, D Munteanu, P Roche, G Gasiot Microelectronics Reliability 54 (8), 1455-1476, 2014 | 49 | 2014 |