| Automatic classification of leukocytes using deep neural network W Yu, J Chang, C Yang, L Zhang, H Shen, Y Xia, J Sha 2017 IEEE 12th international conference on ASIC (ASICON), 1041-1044, 2017 | 115 | 2017 |
| Efficient decoder design for nonbinary quasicyclic LDPC codes J Lin, J Sha, Z Wang, L Li IEEE Transactions on Circuits and Systems I: Regular Papers 57 (5), 1071-1082, 2010 | 87 | 2010 |
| Flexible LDPC decoder design for multigigabit-per-second applications C Zhang, Z Wang, J Sha, L Li, J Lin IEEE Transactions on Circuits and Systems I: Regular Papers 57 (1), 116-124, 2009 | 72 | 2009 |
| Multi-Gb/s LDPC code design and implementation J Sha, Z Wang, M Gao, L Li IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (2), 262-268, 2008 | 63 | 2008 |
| VLSI design for low-density parity-check code decoding Z Wang, Z Cui, J Sha IEEE Circuits and Systems Magazine 11 (1), 52-69, 2011 | 60 | 2011 |
| A memory efficient belief propagation decoder for polar codes J Sha, X Liu, Z Wang, X Zeng China Communications 12 (5), 34-41, 2015 | 55 | 2015 |
| An efficient VLSI architecture for nonbinary LDPC decoders J Lin, J Sha, Z Wang, L Li IEEE Transactions on Circuits and Systems II: Express Briefs 57 (1), 51-55, 2010 | 50 | 2010 |
| An efficient implementation of 2D convolution in CNN J Chang, J Sha IEICE electronics express 14 (1), 20161134-20161134, 2017 | 49 | 2017 |
| An improved scaled DCT architecture Z Wu, J Sha, Z Wang, L Li, M Gao IEEE Transactions on Consumer Electronics 55 (2), 685-689, 2009 | 46 | 2009 |
| Area-efficient Reed-Solomon decoder design for optical communications B Yuan, Z Wang, L Li, M Gao, J Sha, C Zhang IEEE Transactions on Circuits and Systems II: Express Briefs 56 (6), 469-473, 2009 | 42 | 2009 |
| Efficient shuffle network architecture and application for WiMAX LDPC decoders J Lin, Z Wang, L Li, J Sha, M Gao IEEE Transactions on Circuits and Systems II: Express Briefs 56 (3), 215-219, 2009 | 42 | 2009 |
| Hardware architecture for list successive cancellation polar decoder C Zhang, X You, J Sha 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 209-212, 2014 | 39 | 2014 |
| High-speed parallel LFSR architectures based on improved state-space transformations G Hu, J Sha, Z Wang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (3 …, 2016 | 37 | 2016 |
| An FPGA implementation of array LDPC decoder J Sha, M Gao, Z Zhang, L Li, Z Wang APCCAS 2006-2006 IEEE Asia Pacific Conference on Circuits and Systems, 1675-1678, 2006 | 27 | 2006 |
| Prune Deep Neural Networks With the Modified Penalty J Chang, J Sha IEEE Access 7, 2273-2280, 2018 | 23 | 2018 |
| Performance comparison of cross-like Hall plates with different covering layers F Lyu, Z Zhang, EH Toh, X Liu, Y Ding, Y Pan, C Li, L Li, J Sha, H Pan Sensors 15 (1), 672-686, 2014 | 21 | 2014 |
| Decoder design for RS-based LDPC codes J Sha, J Lin, Z Wang, L Li, M Gao IEEE Transactions on Circuits and Systems II: Express Briefs 56 (9), 724-728, 2009 | 21 | 2009 |
| Unified architecture for Reed-Solomon decoder combined with burst-error correction L Li, B Yuan, Z Wang, J Sha, H Pan, W Zheng IEEE transactions on very large scale integration (VLSI) systems 20 (7 …, 2011 | 20 | 2011 |
| Dispersed array LDPC codes and decoder architecture for NAND flash memory W Shao, J Sha, C Zhang IEEE Transactions on Circuits and Systems II: Express Briefs 65 (8), 1014-1018, 2017 | 19 | 2017 |
| The modulation of the seasonal cross‐shelf sea level variation by the cold pool in the Middle Atlantic Bight J Sha, YH Jo, XH Yan, WT Liu Journal of Geophysical Research: Oceans 120 (11), 7182-7194, 2015 | 19 | 2015 |
