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Arun Kumar
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A threshold voltage model of silicon-nanotube-based ultrathin double gate-all-around (DGAA) MOSFETs incorporating quantum confinement effects
A Kumar, S Bhushan, PK Tiwari
IEEE Transactions on Nanotechnology 16 (5), 868-875, 2017
522017
Analytical modeling of subthreshold characteristics of ultra-thin double gate-all-around (DGAA) MOSFETs incorporating quantum confinement effects
A Kumar, S Bhushan, PK Tiwari
Superlattices and Microstructures 109, 567-578, 2017
242017
Self-heating effects and hot carrier degradation in In0. 53Ga0. 47As gate-all-around MOSFETs
P Srinivas, A Kumar, S Jit, PK Tiwari
Semiconductor Science and Technology 35 (6), 065008, 2020
162020
An insight into self-heating effects and its implications on hot carrier degradation for silicon-nanotube-based double gate-all-around (DGAA) MOSFETs
A Kumar, P Srinivas, PK Tiwari
IEEE Journal of the Electron Devices Society 7, 1100-1108, 2019
162019
An Explicit Unified Drain Current Model for Silicon-Nanotube-Based Ultrathin Double Gate-All-Around mosfets
A Kumar, PK Tiwari
IEEE Transactions on Nanotechnology 17 (6), 1224-1234, 2018
152018
Drain current modelling of double gate‐all‐around (DGAA) MOSFETs
A Kumar, S Bhushan, PK Tiwari
IET circuits, devices & systems 13 (4), 519-525, 2019
122019
Physical insight into self-heating effects in ultrathin junctionless gate-all-around FETs
A Kumar, P Srinivas, PK Tiwari
2019 IEEE 9th International Nanoelectronics Conferences (INEC), 1-4, 2019
92019
Compact drain current model of silicon-nanotubebased double gate-all-around (DGAA) MOSFETs incorporating short channel effects
A Kumar, P Srinivas, PK Tiwari
2019 IEEE 14th Nanotechnology Materials and Devices Conference (NMDC), 1-4, 2019
62019
An analytical subthreshold current model of short-channel symmetrical double gate-all-around (DGAA) field-effect-transistors
S Bhushan, A Kumar, D Gola, PK Tiwari
2017 Devices for Integrated Circuit (DevIC), 211-215, 2017
62017
Impact of Process-Induced Inclined Side-Walls on Gate Leakage Current of Nanowire GAA MOSFETs
A Maniyar, P Raj, P Srinivas, A Kumar, KS Chang-Liao, PK Tiwari
IEEE Transactions on Electron Devices, 2024
32024
Physical insight into self-heating induced performance degradation in RingFET
S Singh, P Srinivas, A Kumar, PK Tiwari
Silicon, 1-9, 2021
22021
Analytical Threshold Voltage Model of Schottky-source/drain (Schottky-S/D) double gate-all-around (DGAA) Field-Effect-Transistors (FETs)
A Kumar, P Srinivas, PK Tiwari
2019 Devices for Integrated Circuit (DevIC), 89-93, 2019
12019
A machine learning approach to accelerate reliability prediction in nanowire FETs from self-heating perspective
TS Kumar, A Hazarika, P Srinivas, PK Tiwari, A Kumar
Microelectronics Reliability 161, 115484, 2024
2024
Impact of ambient temperature on CombFET for sub-5-nm technology nodes: An RF performance perspective
P Srinivas, NA Kumari, A Kumar, PK Tiwari, KG Sravani
Microsystem Technologies, 1-9, 2024
2024
Investigation of HCI Effect and BTBT Supported High Ion/Ioff in Split Double-Gate Junctionless FETs
S Kumar, KM Devi, A Kumar
2024 Joint International Conference on Digital Arts, Media and Technology …, 2024
2024
In0.53Ga0.47As Nanosheet MOSFETs with Self-Heating Effects
P Srinivas, A Kumar, PK Tiwari
2022 IEEE Silchar Subsection Conference (SILCON), 1-6, 2022
2022
Silicon Nanotube FETs: From Device Concept to Analytical Model Development
A Kumar, PK Tiwari
Low-Dimensional Nanoelectronic Devices, 153-171, 2022
2022
Effect of self-heating on small-signal parameters of In0. 53Ga0. 47As based gate-all-around MOSFETs
P Srinivas, A Kumar, PK Tiwari
Semiconductor Science and Technology 36 (12), 125012, 2021
2021
Threshold Voltage Modeling of tri-Gate Schottky-Barrier (TGSB) Field-Effect-Transistors (FETs)
P Srinivas, A Kumar, PK Tiwari
Silicon 13, 25-35, 2021
2021
MODELING, SIMULATION AND SELF-HEATING INDUCED DEGRADATION ANALYSIS OF DOUBLE GATE-ALL-AROUND (DGAA) MOSFETs
A Kumar
IIT Patna, 2020
2020
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