| Efficient saving and restoring of context information for context switches AR Acharya US Patent 10,297,003, 2019 | 18 | 2019 |
| Trace buffer based replay for context switching AR Acharya US Patent 9,626,313, 2017 | 12 | 2017 |
| VMID as a GPU task container for virtualization AR Acharya, MJ Mantor, RE Mccrary, A Asaro, JG Cheng, M Fowler US Patent 10,725,822, 2020 | 8 | 2020 |
| Precise suspend and resume of workloads in a processing unit AR Acharya, M Mantor US Patent 11,609,791, 2023 | 6 | 2023 |
| Graphics processing unit preemption with pixel tile level granularity AR Acharya, G Zhong, V Goel US Patent 9,842,376, 2017 | 6 | 2017 |
| Bin streamout preemption in a graphics processing pipeline AR Acharya, M Mantor, V Goel, S Sakharshete US Patent App. 15/639,980, 2019 | 4 | 2019 |
| Primitive level preemption using discrete non-real-time and real time pipelines AR Acharya, S Sakharshete, M Mantor, MP Nijasure, T Martin, V Goel US Patent 10,453,243, 2019 | 3 | 2019 |
| Selectively writing back dirty cache lines concurrently with processing NMS Bijapur, A Khandelwal, L Lefebvre, AR Acharya US Patent 11,562,459, 2023 | 2 | 2023 |
| Processing system with selective priority-based two-level binning AR Acharya, R Wu, YI Yeo US Patent App. 17/231,425, 2022 | 2 | 2022 |
| Primitive level preemption using discrete non-real-time and real time pipelines AR Acharya, S Sakharshete, M Mantor, MP Nijasure, T Martin, V Goel US Patent 10,210,650, 2019 | 2 | 2019 |
| Command processor prefetch techniques AR Acharya, AF Ashkar US Patent 11,782,838, 2023 | 1 | 2023 |
| VMID as a GPU task container for virtualization AR Acharya, MJ Mantor, RE Mccrary, A Asaro, JG Cheng, M Fowler US Patent 11,467,870, 2022 | 1 | 2022 |
| Fine grained replay control in binning hardware JH Achrenius, K Kallio, M Kangasluoma, R Wu, AR Acharya US Patent App. 17/033,023, 2021 | 1 | 2021 |
| Adaptive context switching AR Acharya, AV Bourd, DRG Garcia, MN Nemlekar, V Goel US Patent 10,210,593, 2019 | 1 | 2019 |
| GPU operation algorithm selection based on command stream marker AR Acharya, DRG Garcia, NT Poole US Patent 10,134,103, 2018 | 1 | 2018 |
| Separate clocking for components of a graphics processing unit RK Sajja, S Godey, AR Acharya US Patent App. 18/603,883, 2024 | | 2024 |
| Secure memory access in a virtualized computing environment A Asaro, JG Cheng, AR Acharya US Patent App. 18/517,513, 2024 | | 2024 |
| Graphics processing unit with selective two-level binning AR Acharya, R Wu, PE Ruggieri US Patent 12,086,899, 2024 | | 2024 |
| Hybrid binning M Tuomi, K Kallio, R Wu, AR Acharya, V Goel US Patent App. 18/633,166, 2024 | | 2024 |
| Systems and methods for distributed rendering using two-level binning AR Acharya, R Wu US Patent 12,051,154, 2024 | | 2024 |
