| Register cache system not for latency reduction purpose R Shioya, K Horio, M Goshima, S Sakai 2010 43rd Annual IEEE/ACM international symposium on microarchitecture, 301-312, 2010 | 58 | 2010 |
| An open source FPGA-optimized out-of-order RISC-V soft processor S Mashimo, A Fujita, R Matsuo, S Akaki, A Fukuda, T Koizumi, ... 2019 International Conference on Field-Programmable Technology (ICFPT), 63-71, 2019 | 45 | 2019 |
| A front-end execution architecture for high energy efficiency R Shioya, M Goshima, H Ando 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 419-431, 2014 | 44 | 2014 |
| Base address recognition with data flow tracking for injection attack detection S Katsunuma, H Kurita, R Shioya, K Shimizu, H Irie, M Goshima, S Sakai 2006 12th Pacific Rim International Symposium on Dependable Computing (PRDC …, 2006 | 25 | 2006 |
| D-jolt: Distant jolt prefetcher T Nakamura, T Koizumi, Y Degawa, H Irie, S Sakai, R Shioya The 1st Instruction Prefetching Championship (IPC1), 2020 | 20 | 2020 |
| Low-overhead architecture for security tag R Shioya, D Kim, K Horio, M Goshima, S Sakai IEICE TRANSACTIONS on Information and Systems 94 (1), 69-78, 2011 | 19 | 2011 |
| STRAIGHT: Hazardless processor architecture without register renaming H Irie, T Koizumi, A Fukuda, S Akaki, S Nakae, Y Bessho, R Shioya, ... 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 18 | 2018 |
| Energy efficiency improvement of renamed trace cache through the reduction of dependent path length R Shioya, H Ando 2014 IEEE 32nd International Conference on Computer Design (ICCD), 416-423, 2014 | 11 | 2014 |
| Design and implementation of a processor simulator onikiri2 R Shioya Proc. Symposium on Advanced Computing Systems and Infrastructures (SACSIS …, 2009 | 8 | 2009 |
| A high-performance out-of-order soft processor without register renaming S Mitsuno, J Kadomoto, T Koizumi, R Shioya, H Irie, S Sakai 2020 30th International Conference on Field-Programmable Logic and …, 2020 | 7 | 2020 |
| Compiling and optimizing real-world programs for STRAIGHT ISA T Koizumi, S Sugita, R Shioya, J Kadomoto, H Irie, S Sakai 2021 IEEE 39th International Conference on Computer Design (ICCD), 400-408, 2021 | 6 | 2021 |
| Address order violation detection with parallel counting bloom filters N Kurata, R Shioya, M Goshima, S Sakai IEICE Transactions on Electronics 98 (7), 580-593, 2015 | 6 | 2015 |
| An area-efficient out-of-order soft-core processor without register renaming J Kadomoto, T Koizumi, A Fukuda, R Matsuo, S Mashimo, A Fujita, ... 2018 International Conference on Field-Programmable Technology (FPT), 374-377, 2018 | 5 | 2018 |
| Applying razor flip-flops to sram read circuits U Jimbo, J Yamada, R Shioya, M Goshima IEICE Transactions on Electronics 100 (3), 245-258, 2017 | 5 | 2017 |
| Information processing device, information processing method, and computer readable recording medium S Katsunuma, M Goshima, H Irie, R Shioya, S Sakai US Patent 8,413,240, 2013 | 5 | 2013 |
| Dynamic information flow control for Preventing Information Leakage H Kurita, R Shioya, H Irie, M Goshima, S Sakai Proceedings of the IPSJ SIG Technical Report, 1-2, 2007 | 5 | 2007 |
| String-wise information flow tracking against script injection attacks K Li, R Shioya, M Goshima, S Sakai 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing …, 2009 | 4 | 2009 |
| 情報漏洩防止プラットフォーム 横田侑樹， 塩谷亮太， 五島正裕， 坂井修一 電子情報通信学会技術研究報告; 信学技報 109 (237), 7-12, 2009 | 4 | 2009 |
| T-SKID: predicting when to prefetch separately from address prediction T Koizumi, T Nakamura, Y Degawa, H Irie, S Sakai, R Shioya 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2022 | 3 | 2022 |
| Rearranging random issue queue with high IPC and short delay S Sakai, T Suenaga, R Shioya, H Ando 2018 IEEE 36th International Conference on Computer Design (ICCD), 123-131, 2018 | 3 | 2018 |
Tomoaki TsumuraNagoya Institute of Technology, Japan在 nitech.ac.jp 的电子邮件经过验证
Tomoaki TsumuraNagoya Institute of Technology, Japan在 nitech.ac.jp 的电子邮件经过验证