| Tunnelling-based ternary metal–oxide–semiconductor technology JW Jeong, YE Choi, WS Kim, JH Park, S Kim, S Shin, K Lee, J Chang, ... Nature Electronics 2 (7), 307-312, 2019 | 108 | 2019 |
| ZnO composite nanolayer with mobility edge quantization for multi-value logic transistors L Lee, J Hwang, JW Jung, J Kim, HI Lee, S Heo, M Yoon, S Choi, ... Nature communications 10 (1), 1998, 2019 | 85 | 2019 |
| Compact design of low power standard ternary inverter based on OFF-state current mechanism using nano-CMOS technology S Shin, E Jang, JW Jeong, BG Park, KR Kim IEEE Transactions on Electron Devices 62 (8), 2396-2403, 2015 | 63 | 2015 |
| A novel ternary multiplier based on ternary CMOS compact model Y Kang, J Kim, S Kim, S Shin, ES Jang, JW Jeong, KR Kim, S Kang 2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL), 25-30, 2017 | 38 | 2017 |
| CMOS-compatible ternary device platform for physical synthesis of multi-valued logic circuits S Shin, E Jang, JW Jeong, KR Kim 2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL), 284-289, 2017 | 13 | 2017 |
| Ultra-low standby power and static noise-immune standard ternary inverter based on nanoscale ternary CMOS technology S Shin, JW Jeong, E Jang, KR Kim 2017 IEEE 17th International Conference on Nanotechnology (IEEE-NANO), 13-16, 2017 | 11 | 2017 |
| Multi-valued logic device technology; overview, status, and its future for peta-scale information density KR Kim, JW Jeong, YE Choi, WS Kim, J Chang Journal of Semiconductor Engineering 1 (1), 57-63, 2020 | 9 | 2020 |
| Demonstration of standrad ternary inverter based on CMOS technology S Shin, E Jang, JW Jeong, KR Kim 2016 IEEE Silicon Nanoelectronics Workshop (SNW), 170-171, 2016 | 9 | 2016 |
| Ternary digit logic circuit KR Kim, SH Shin, E San Jang, JW Jeong US Patent 10,133,550, 2018 | 5 | 2018 |
| Low leakage III-V/Ge CMOS FinFET design for high-performance logic applications with high-k spacer technology E Jang, S Shin, JW Jeong, KR Kim Journal of semiconductor technology and science 18 (3), 295-300, 2018 | 4 | 2018 |
| Multiple negative differential resistance device by using the ambipolar behavior of tunneling field effect transistor with fast switching characteristics JW Jeong, ES Jang, S Shin, KR Kim Journal of Nanoscience and Nanotechnology 16 (5), 4753-4757, 2016 | 2 | 2016 |
| Memory device including ternary memory cell KR Kim, JW Jeong, Y Choi, W Kim, M Kim US Patent App. 17/672,650, 2022 | 1 | 2022 |
| Tunnel field effect transistor and ternary inverter comprising same KR Kim, JW Chang, JW Jeong, Y Choi, W Kim US Patent 12,009,393, 2024 | | 2024 |
| Transistor element, ternary inverter apparatus comprising same, and method for producing same KR Kim, JW Jeong, YE Choi, WS Kim, J Chang US Patent App. 18/411,943, 2024 | | 2024 |
| Ternary logic circuit KR Kim, JW Jeong, Y Choi, W Kim, JH Jun US Patent 11,923,846, 2024 | | 2024 |
| Transistor element, ternary inverter apparatus comprising same, and method for producing same KR Kim, JW Jeong, YE Choi, WS Kim, J Chang US Patent 11,908,863, 2024 | | 2024 |
| Ternary memory cell for logic-in-memory and memory device comprising same KR Kim, JW Jeong, YE Choi US Patent 11,727,988, 2023 | | 2023 |
| Ternary inverter and method of manufacturing the same KR Kim, JW Jeong, Y Choi, W Kim US Patent App. 17/673,754, 2023 | | 2023 |
| Tunnel field effect transistor and ternary inverter including the same KR Kim, JW Chang, JW Jeong, Y Choi, W Kim US Patent App. 17/673,766, 2023 | | 2023 |
| Ternary content addressable memory device based on ternary memory cell KR Kim, JW Jeong, Y Choi, W Kim US Patent App. 17/672,662, 2022 | | 2022 |
