| BrainFrame: a node-level heterogeneous accelerator platform for neuron simulations G Smaragdos, G Chatzikonstantis, R Kukreja, H Sidiropoulos, ... Journal of neural engineering 14 (6), 066008, 2017 | 27 | 2017 |
| On supporting efficient partial reconfiguration with just-in-time compilation H Sidiropoulos, K Siozios, P Figuli, D Soudris, M Hubner 2012 IEEE 26th International Parallel and Distributed Processing Symposium …, 2012 | 22 | 2012 |
| Jitpr: A framework for supporting fast application's implementation onto fpgas H Sidiropoulos, K Siozios, P Figuli, D Soudris, M Hübner, J Becker ACM Transactions on Reconfigurable Technology and Systems (TRETS) 6 (2), 1-12, 2013 | 15 | 2013 |
| Multinode implementation of an extended hodgkin–huxley simulator G Chatzikonstantis, H Sidiropoulos, C Strydis, M Negrello, G Smaragdos, ... Neurocomputing 329, 370-383, 2019 | 12 | 2019 |
| A novel 3-D FPGA architecture targeting communication intensive applications H Sidiropoulos, K Siozios, D Soudris Journal of Systems Architecture 60 (1), 32-39, 2014 | 8 | 2014 |
| Rapid prototyping of digital controllers using FPGAs and ESL/HLS design methodologies C Economakos, H Sidiropoulos, G Economakos 2013 19th International Conference on Automation and Computing, 1-6, 2013 | 8 | 2013 |
| A platform-independent runtime methodology for mapping multiple applications onto FPGAs through resource virtualization H Sidiropoulos, P Figuli, K Siozios, D Soudris, J Becker 2013 23rd International Conference on Field programmable Logic and …, 2013 | 8 | 2013 |
| On supporting rapid exploration of memory hierarchies onto fpgas H Sidiropoulos, K Siozios, D Soudris Journal of Systems Architecture 59 (2), 78-90, 2013 | 7 | 2013 |
| EDEN: A high-performance, general-purpose, NeuroML-based neural simulator S Panagiotou, H Sidiropoulos, D Soudris, M Negrello, C Strydis Frontiers in neuroinformatics 16, 724336, 2022 | 6 | 2022 |
| A methodology and tool framework for supporting rapid exploration of memory hierarchies in FPGAs H Sidiropoulos, K Siozios, D Soudris 2011 21st International Conference on Field Programmable Logic and …, 2011 | 4 | 2011 |
| A novel simulator for extended Hodgkin-Huxley neural networks S Panagiotou, R Miedema, H Sidiropoulos, G Smaragdos, C Strydis, ... 2020 IEEE 20th International Conference on Bioinformatics and Bioengineering …, 2020 | 3 | 2020 |
| On supporting efficient implementation of communication-intensive applications onto 3D FPGAs H Sidiropoulos, K Siozios, D Soudris Workshop on Reconfigurable Computing (WRC), 2012 | 3 | 2012 |
| The VINEYARD framework for heterogeneous cloud applications: The BrainFrame case H Sidiropoulos, G Chatzikonstantis, D Soudris, C Strydis 2018 Conference on Design and Architectures for Signal and Image Processing …, 2018 | 2 | 2018 |
| From knights corner to landing: A case study based on a hodgkin-huxley neuron simulator G Chatzikonstantis, D Jiménez, E Meneses, C Strydis, H Sidiropoulos, ... International Conference on High Performance Computing, 363-375, 2017 | 2 | 2017 |
| On designing self-aware reconfigurable platforms K Siozios, H Sidiropoulos, D Diamantopoulos, P Figuli, D Soudris, ... architecture 4 (8), 9, 2012 | 2 | 2012 |
| A framework for architecture-level exploration of communication intensive applications onto 3-d fpgas H Sidiropoulos, K Siozios, D Soudris 2011 21st International Conference on Field Programmable Logic and …, 2011 | 2 | 2011 |
| A Novel Concept for Adaptive Signal Processing on Reconfigurable Hardware P Figuli, C Tradowsky, J Martinez, H Sidiropoulos, K Siozios, H Stenschke, ... Applied Reconfigurable Computing: 11th International Symposium, ARC 2015 …, 2015 | 1 | 2015 |
| TEAChER: TEach AdvanCEd Reconfigurable Architectures and Tools K Siozios, P Figuli, H Sidiropoulos, C Tradowsky, D Diamantopoulos, ... Applied Reconfigurable Computing: 11th International Symposium, ARC 2015 …, 2015 | 1 | 2015 |
| A Framework for Mapping Dynamic Virtual Kernels onto Heterogeneous Reconfigurable Platforms. H Sidiropoulos, K Siozios, D Soudris IPDPS Workshops, 170-175, 2014 | 1 | 2014 |
| A framework for architecture-level exploration of 3-D FPGA platforms H Sidiropoulos, K Siozios, D Soudris Integrated Circuit and System Design. Power and Timing Modeling …, 2011 | 1 | 2011 |
Dimitrios SoudrisProfessor, Electrical & Computer Eng., National Technical Univ. of Athens在 microlab.ntua.gr 的电子邮件经过验证
