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Amit Jha
Amit Jha
Qualcomm Atheros, San Jose
在 ieee.org 的电子邮件经过验证
标题
引用次数
引用次数
年份
PSP: An advanced surface-potential-based MOSFET model for circuit simulation
G Gildenblat, X Li, W Wu, H Wang, A Jha, R Van Langevelde, GDJ Smit, ...
IEEE Transactions on Electron Devices 53 (9), 1979-1993, 2006
4802006
Benchmark tests for MOSFET compact models with application to the PSP model
X Li, W Wu, A Jha, G Gildenblat, R van Langevelde, GDJ Smit, ...
IEEE Transactions on Electron Devices 56 (2), 243-251, 2009
392009
410-GHz CMOS imager using a 4th sub-harmonic mixer with effective NEP of 0.3 fW/Hz0.5 at 1-kHz noise bandwidth
W Choi, Z Ahmad, A Jha, JY Lee, I Kim, KO Kenneth
2015 Symposium on VLSI Circuits (VLSI Circuits), C302-C303, 2015
322015
Benchmarking the PSP compact model for MOS transistors
X Li, W Wu, A Jha, G Gildenblat, R Van Langevelde, GDJ Smit, ...
2007 IEEE International Conference on Microelectronic Test Structures, 259-264, 2007
182007
Approaches to Area Efficient High-Performance Voltage-Controlled Oscillators in Nanoscale CMOS
A Jha, P Yelleswarapu, K Liao, G Yeap, K K. O.
IEEE Transactions on Microwave Theory and Techniques, 1-1, 2020
162020
Theory and modeling techniques used in the PSP model
G Gildenblat, X Li, H Wang, W Wu, A Jha, R Van Langevelde, AJ Scholten, ...
Proc. NSTI-Nanotech WCM, 409-604, 2006
112006
IEEE Trans. Electron Devices
G Gildenblat, X Li, W Wu, H Wang, A Jha, R van Langevelde
IEEE Trans. Electron Devices 53 (9), 1979-1993, 2006
92006
Voltage controlled oscillator area reduction in nano-scale CMOS
A Jha, K Liao, G Yeap, KO Kenneth
2014 IEEE Radio Frequency Integrated Circuits Symposium, 421-424, 2014
72014
− 197dBc/Hz FOM 4.3-GHz VCO Using an addressable array of minimum-sized nmos cross-coupled transistor pairs in 65-nm CMOS
A Jha, A Ahmadi, S Kshattry, T Cao, K Liao, G Yeap, Y Makris, O KK
2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), 1-2, 2016
62016
Phase noise reduction in LC VCO’s using an array of cross-coupled nanoscale MOSFETs and intelligent post-fabrication selection
P Yelleswarapu, A Jha, R Willis, Y Makris
IEEE Transactions on Microwave Theory and Techniques 70 (6), 3244-3256, 2022
52022
A 5.4GHz 0.65dB NF 6dBm IIP3 MGTR LNA in 130nm SOI CMOS
A Jha, J Zheng, C Masse, P Hurwitz, S Chaudhry
2021 IEEE 20th Topical Meeting on Silicon Monolithic Integrated Circuits in …, 2021
32021
A 0.6dB NF, 12dBm IIP3, 4.6-6GHz LNA in 0.13μm Floating-Body SOI CMOS
A Jha, J Zheng, C Masse, P Hurwitz, S Chaudhry
2020 IEEE 63rd International Midwest Symposium on Circuits and Systems …, 2020
32020
Frequency Sensitivity of Integrated Oscillators to Nearby Conductors
A Jha, K K. O
2021 IEEE 20th Topical Meeting on Silicon Monolithic Integrated Circuits in …, 2021
22021
Design approaches for signal generation circuits in nano-scaled CMOS processes
A Jha
The University of Texas at Dallas, 2016
12016
Low Phase Noise Signal Generation Circuits in CMOS for Autonomous Sensors and Communication Systems
YMKKO P. Yelleswarapu, A. Jha, A. Ahmadi, F. Jalalibidgoli, R. Willis
SRC TECHCON, 2019
2019
The PSP compact MOSFET model
GJ Smit, A Scholten, DBM Klaassen, R van Langevelde, G Gildenblat, ...
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