| A unified algorithm based on HTS and self-adapting PSO for the construction of octagonal and rectilinear SMT G Liu, Z Chen, Z Zhuang, W Guo, G Chen Soft Computing 24 (6), 3943-3961, 2020 | 89 | 2020 |
| Efficient vlsi routing algorithm employing novel discrete pso and multi-stage transformation G Liu, W Zhu, S Xu, Z Zhuang, YC Chen, G Chen Journal of Ambient Intelligence and Humanized Computing, 1-16, 2020 | 28 | 2020 |
| Rdta: an efficient routability-driven track assignment algorithm G Liu, Z Zhuang, W Guo, TC Wang Proceedings of the 2019 on Great Lakes symposium on VLSI, 315-318, 2019 | 14 | 2019 |
| Minidelay: Multi-strategy timing-aware layer assignment for advanced technology nodes X Zhang, Z Zhuang, G Liu, X Huang, WH Liu, W Guo, TC Wang 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 586-591, 2020 | 12 | 2020 |
| X-architecture Steiner minimal tree construction based on discrete differential evolution H Wu, S Xu, Z Zhuang, G Liu Advances in Natural Computation, Fuzzy Systems and Knowledge Discovery …, 2020 | 12 | 2020 |
| A high performance X-architecture multilayer global router for vlsi GG LIU, Z ZHUANG, WZ GUO, GL CHEN Acta Automatica Sinica 46 (1), 79-93, 2020 | 11 | 2020 |
| Multi-Package Co-Design for Chiplet Integration Z Zhuang, B Yu, KY Chao, TY Ho Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022 | 9 | 2022 |
| Msfroute: Multi-stage fpga routing for timing division multiplexing technique Z Zhuang, G Liu, X Huang, X Jia, WH Liu, W Guo Proceedings of the 2020 on Great Lakes Symposium on VLSI, 107-112, 2020 | 7 | 2020 |
| ALIFRouter: A Practical Architecture-Level Inter-FPGA Router for Logic Verification Z Zhuang, X Huang, G Liu, W Guo, W Qian, WH Liu 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 4 | 2021 |
| Floorplet: Performance-aware Floorplan Framework for Chiplet Integration S Chen, S Li, Z Zhuang, S Zheng, Z Liang, TY Ho, B Yu, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 | 3 | 2023 |
| TRADER: A Practical Track-Assignment-Based Detailed Router Z Zhuang, G Liu, TY Ho, B Yu, W Guo 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 766-771, 2022 | 3 | 2022 |
| A novel particle swarm optimizer with multi-stage transformation and genetic operation for VLSI routing G Liu, Z Zhuang, W Guo, N Xiong, G Chen arXiv preprint arXiv:1811.10225, 2018 | 2 | 2018 |
| SPTA: A Scalable Parallel ILP-Based Track Assignment Algorithm with Two-Stage Partition Y Jing, L Yang, Z Zhuang, G Liu, X Huang, WH Liu, TC Wang 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration …, 2022 | 1 | 2022 |
| A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm Optimization G Liu, Y Zhu, Z Zhuang, Z Pei, M Gan, X Huang, W Guo IEEE Transactions on Systems, Man, and Cybernetics: Systems, 2024 | | 2024 |
| Multi-Product Optimization for 3D Heterogeneous Integration with D2W Bonding Z Zhuang, KY Chao, B Yu, TY Ho, MDF Wong 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023 | | 2023 |
Genggeng LiuFuzhou University, Associate Professor and Doctoral Supervisor在 fzu.edu.cn 的电子邮件经过验证
