| A deep neural network accelerator based on tiled RRAM architecture Q Wang, X Wang, SH Lee, FH Meng, WD Lu 2019 IEEE international electron devices meeting (IEDM), 14.4. 1-14.4. 4, 2019 | 66 | 2019 |
| Side-channel attack analysis on in-memory computing architectures Z Wang, F Meng, Y Park, JK Eshraghian, WD Lu IEEE Transactions on Emerging Topics in Computing 12 (1), 109-121, 2023 | 24 | 2023 |
| TAICHI: A tiled architecture for in-memory computing and heterogeneous integration X Wang, R Pinkham, MA Zidan, FH Meng, MP Flynn, Z Zhang, WD Lu IEEE Transactions on Circuits and Systems II: Express Briefs 69 (2), 559-563, 2021 | 15 | 2021 |
| Investigation of parasitic resistance and capacitance effects in nanoscaled FinFETs and their impact on static random-access memory cells BR Huang, FH Meng, YC King, CJ Lin Japanese Journal of Applied Physics 56 (4S), 04CD11, 2017 | 14 | 2017 |
| Matrix Data Reuse Techniques in Processing Systems J Botimer, M Zidan, C Liu, F Meng, T Wesley, W Lu, Z Zhang US Patent App. 16/731,035, 2021 | 12 | 2021 |
| Exploring compute-in-memory architecture granularity for structured pruning of neural networks FH Meng, X Wang, Z Wang, EYJ Lee, WD Lu IEEE Journal on Emerging and Selected Topics in Circuits and Systems 12 (4 …, 2022 | 10 | 2022 |
| Effect of three-dimensional current distribution on characterizing parasitic resistance of FinFETs FH Meng, PY Lin, YL Chiu, BR Huang, CJ Lin, YC King Japanese Journal of Applied Physics 55 (4S), 04ED16, 2016 | 10 | 2016 |
| Deep neural network mapping and performance analysis on tiled rram architecture X Wang, Q Wang, FH Meng, SH Lee, WD Lu 2020 2nd IEEE International Conference on Artificial Intelligence Circuits …, 2020 | 5 | 2020 |
| TT-CIM: Tensor Train Decomposition for Neural Network in RRAM-Based Compute-in-Memory Systems FH Meng, Y Wu, Z Zhang, WD Lu IEEE Transactions on Circuits and Systems I: Regular Papers, 2023 | 3 | 2023 |
| Non-volatile memory based processors and dataflow techniques Z Zhang, M Zidan, F Meng, C Liu, J Botimer, T Wesley, W Lu US Patent 11,537,535, 2022 | 2 | 2022 |
| Spatiotemporal Spike Pattern Detection with Second-order Memristive Synapses Y Wu, S Yoo, FH Meng, WD Lu 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 625-628, 2022 | 1 | 2022 |
| Memory processing unit architecture MA Zidan, JC Botimer, C Liu, F Meng, TA Wesley, Z Zhang, W Lu US Patent 11,488,650, 2022 | | 2022 |
| Martix multiplication engines F Meng, M Zidan, Z Zhang, W Lu US Patent App. 17/000,192, 2022 | | 2022 |
