| Laser-induced controllable instruction replacement fault attack J Sakamoto, D Fujimoto, T Matsumoto IEICE Transactions on Fundamentals of Electronics, Communications and …, 2020 | 8 | 2020 |
| Implementation and analysis of fully homomorphic encryption in resource-constrained devices A Prasitsupparote, Y Watanabe, J Sakamoto, J Shikata, T Matsumoto International Journal of Digital Information and Wireless Communications 8 …, 2018 | 4 | 2018 |
| Low-latency pairing processor architecture using fully-unrolled quotient pipelining montgomery multiplier J Sakamoto, Y Nagahama, D Fujimoto, Y Okuaki, T Matsumoto 2019 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), 1-6, 2019 | 3 | 2019 |
| RAM Encryption Mechanism without Hardware Support T Matsumoto, R Miyachi, J Sakamoto, M Suzuki, D Watanabe, N Yoshida Journal of Information Processing 28, 473-480, 2020 | 2 | 2020 |
| Non-Profiled Deep Learning-Based Side-Channel Analysis With Only One Network Training K Imafuku, S Kawamura, H Nozaki, J Sakamoto, S Osuka IEEE Access, 2023 | 1 | 2023 |
| Application of Profiled Analysis to ADC-Based Remote Side-Channel Attacks J Sakamoto, K Tachibana, T Matsumoto 2023 IEEE 9th Intl Conference on Big Data Security on Cloud (BigDataSecurity …, 2023 | 1 | 2023 |
| Constructing software countermeasures against instruction manipulation attacks: an approach based on vulnerability evaluation using fault simulator J Sakamoto, S Hayashi, D Fujimoto, T Matsumoto Cluster Computing 25 (4), 2739-2753, 2022 | 1 | 2022 |
| An SoC-Oriented Coprocessor for Bilinear Pairing in Affine Coordinates J Sakamoto, N Yoshida, R Saitou, T Kitagawa, K Fukushima, S Miyauchi, ... 2022 37th International Technical Conference on Circuits/Systems, Computers …, 2022 | 1 | 2022 |
| Efficient software implementation of GMT6-672 and GMT8-542 pairing-friendly curves for a 128-bit security level Z Song, J Sakamoto, S Mitsunari, N Yoshida, R Anzai, T Matsumoto International Conference on Applied Cryptography and Network Security, 461-478, 2022 | 1 | 2022 |
| Key Agreement Over Inter-Process Communication M Suzuki, D Watanabe, T Matsumoto, N Yoshida, J Sakamoto IEEE Access 9, 137367-137383, 2021 | 1 | 2021 |
| How to code data integrity verification secure against single-spot-laser-induced instruction manipulation attacks J Sakamoto, S Hayashi, D Fujimoto, T Matsumoto 2020 IEEE/ACS 17th International Conference on Computer Systems and …, 2020 | 1 | 2020 |
| High-Throughput Bilinear Pairing Processor for Server-Side FPGA Applications J Sakamoto, D Fujimoto, R Anzai, N Yoshida, T Matsumoto IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024 | | 2024 |
| Effective Layout Design for Laser Fault Sensor on FPGA S Hayashi, J Sakamoto, M Chikano, T Matsumoto Proceedings of the 2023 Workshop on Attacks and Solutions in Hardware …, 2023 | | 2023 |
| Non-Destructive Hardware Trojan Circuit Screening by Backside Near Infrared Imaging J Sakamoto, H Sakane, Y Hori, S Kawamura, Y Hayashi, M Nagata 2023 IEEE Physical Assurance and Inspection of Electronics (PAINE), 1-7, 2023 | | 2023 |
| BLS12-381 Pairing Implementation with RAM Footprint Smaller than 4KB R Anzai, J Sakamoto, N Yoshida, T Matsumoto 2022 37th International Technical Conference on Circuits/Systems, Computers …, 2022 | | 2022 |
| Laser irradiation on EEPROM sense amplifiers enhances side-channel leakage of read bits J Sakamoto, D Fujimoto, T Matsumoto 2016 IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), 1-6, 2016 | | 2016 |
