A noise-cancelling receiver resilient to large harmonic blockers D Murphy, H Darabi, H Xu IEEE Journal of Solid-State Circuits 50 (6), 1336-1350, 2015 | 93 | 2015 |
Analysis and design of regenerative comparators for low offset and noise H Xu, AA Abidi IEEE Transactions on Circuits and Systems I: Regular Papers 66 (8), 2817-2830, 2019 | 76 | 2019 |
Understanding the regenerative comparator circuit A Abidi, H Xu Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the, 1-8, 2014 | 71 | 2014 |
Design methodology for phase-locked loops using binary (bang-bang) phase detectors H Xu, AA Abidi IEEE Transactions on Circuits and Systems I: Regular Papers 64 (7), 1637-1650, 2017 | 51 | 2017 |
3.6 A noise-cancelling receiver with enhanced resilience to harmonic blockers D Murphy, H Darabi, H Xu 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 37 | 2014 |
16.6 A Calibration-Free Triple-Loop Bang-Bang PLL Achieving 131fsrms Jitter and-70dBc Fractional Spurs D Yang, A Abidi, H Darabi, H Xu, D Murphy, H Wu, Z Wang 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 266-268, 2019 | 22 | 2019 |
A tutorial on systematic design of CMOS A/D converters: Illustrated by a 10 b, 500 MS/s SAR ADC with 2 GHz RBW T Iizuka, H Xu, AA Abidi ESSCIRC 2021-IEEE 47th European Solid State Circuits Conference (ESSCIRC …, 2021 | 7 | 2021 |
A 6–12 GHz wideband low-noise amplifier with 0.8–1.5 dB NF and±0.75 dB ripple enabled by the capacitor assisting triple-winding transformer T Zou, H Xu, Y Wang, W Liu, T Han, M Tian, W Zhu, N Yan IEEE Transactions on Circuits and Systems I: Regular Papers 70 (7), 2802-2813, 2023 | 6 | 2023 |
Mixed-signal circuit design driven by analysis: ADCs, comparators, and PLLs H Xu University of California, Los Angeles, 2018 | 6 | 2018 |
Analysis and design of a dual-mode VCO with inherent mode compensation enabling a 7.9–14.3-GHz 85-fs-rms jitter PLL Y Wang, J Shi, H Xu, S Ji, Y Mao, T Zou, J Tao, H Min, N Yan IEEE Journal of Solid-State Circuits 58 (8), 2252-2266, 2023 | 5 | 2023 |
A 23-30 GHz 4-Path Series-Parallel-Combined Class-AB Power Amplifier with 23 dBm Psat, 38.5% Peak PAE and 1.3° AM-PM Distortion in 40nm Bulk CMOS J Gu, H Qin, H Xu, W Liu, K Han, R Yin, L Deng, X Shen, Z Duan, H Gao, ... 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 197-200, 2023 | 4 | 2023 |
A 26-32GHz 6-bit bidirectional passive phase shifter with 14dBm IP1dB and 2.6° RMS phase error for phased array system in 40nm CMOS Y Tian, J Gu, H Xu, W Liu, Z Duan, H Gao, N Yan 2023 IEEE/MTT-S International Microwave Symposium-IMS 2023, 195-198, 2023 | 3 | 2023 |
A Capacitor Assisting Triple-Winding Transformer Low-Noise Amplifier with 0.8-1.5dB NF Ripple in 130nm SOI CMOS T Zou, H Xu, Y Wang, W Liu, T Han, Z Wang, N Li, M Tian, W Zhu, N Yan 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 231-234, 2022 | 3 | 2022 |
Wireless power transfer method and system H Xu, H Wu, R Wang US Patent 9,742,222, 2017 | 3 | 2017 |
A 10-bit 563-fs Step Constant-Slope Digital-to-Time Converter in 40-nm CMOS With Nonlinearity Cancellation and Range Extension Techniques Y Liu, H Gao, H Xu, P Lu, N Yan IEEE Transactions on Circuits and Systems I: Regular Papers, 2023 | 2 | 2023 |
A 57-64 GHz Two-Way Parallel-Combined Power Amplifier with 16.6 dBm Psat and 23.6% Peak PAE in 40nm Bulk CMOS J Gu, H Xu, N Yan, H Qin, R Yin, G Jin, X Shen 2022 IEEE International Symposium on Radio-Frequency Integration Technology …, 2022 | 2 | 2022 |
A 28-GHz Series-Parallel Combined Doherty Power Amplifier with PBO Efficiency Enhancement in 40nm Bulk CMOS J Gu, H Qin, G Jin, H Xu, W Liu, T Han, M Tian, W Zhu, N Yan 2022 IEEE MTT-S International Wireless Symposium (IWS) 1, 1-3, 2022 | 2 | 2022 |
A 26-32GHz Differential Attenuator with 0.23 dB RMS Attenuation Error and 11.2 dBm IP1dB in 40nm CMOS Process A Sun, J Gu, H Xu, W Liu, K Han, R Yin, Z Duan, H Gao, N Yan 2023 IEEE/MTT-S International Microwave Symposium-IMS 2023, 178-181, 2023 | 1 | 2023 |
The Design of a 57-65GHz SPDT Switch with LC Resonant Techniques in 40 nm CMOS Process A Sun, J Gu, H Xu, W Liu, T Han, M Tian, W Zhu, N Yan 2022 IEEE MTT-S International Wireless Symposium (IWS) 1, 1-3, 2022 | 1 | 2022 |
Cryo-CMOS Model-Enabled 8-Bit Current Steering DAC Design for Quantum Computing Y Hu, Z Wang, R Chen, Z Tang, A Guo, C Cao, W Wu, S Chen, Y Zhao, ... 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 3413-3417, 2022 | 1 | 2022 |