| Design of analog to digital converter using CMOS logic P Iyappan, P Jamuna, YS Vijayasamundiswary 2009 International Conference on Advances in Recent Technologies in …, 2009 | 35 | 2009 |
| A heuristic method: Differential evolution for harmonic reduction in multilevel inverter system P Jamuna, CCA Rajan International Journal of Computer and Electrical Engineering 5 (5), 482, 2013 | 8 | 2013 |
| New asymmetrical multilevel inverter based dynamic voltage restorer P Jamuna, CCA Rajan Journal of Electrical Engineering 13 (1), 9-9, 2013 | 7 | 2013 |
| MSPWM & MTPWM techniques for asymmetric H-bridge multilevel inverter P Jamuna, CCA Rajan IEEE-International Conference On Advances In Engineering, Science And …, 2012 | 7 | 2012 |
| Analysis of new H-bridge based cascaded multilevel inverter P Jamuna, CCA Rajan, K Gowri, V Vijayasanthi 2016 10th International Conference on Intelligent Systems and Control (ISCO …, 2016 | 6 | 2016 |
| Hybrid Simulated Annealing and Spotted Hyena Optimization Algorithm-Based Resource Management and Scheduling in Cloud Environment P Iyappan, P Jamuna Wireless Personal Communications 133 (2), 1123-1147, 2023 | 3 | 2023 |
| Design and Analysis of STATCOM using Asymmetrical Multilevel Inverter for Power Quality Problems P Jamuna, CCA Rajan Int. J. Innov. Eng. Technol. 10 (1), 80-88, 2020 | 1 | 2020 |
| Reactive power improvement in the power system using facts controllers P Jamuna Department of Electrical and Electronics Engineering, Pondicherry …, 2017 | | 2017 |
