| Stateful reconfigurable logic via a single-voltage-gated spin hall-effect driven magnetic tunnel junction in a spintronic memory H Zhang, W Kang, L Wang, KL Wang, W Zhao IEEE Transactions on Electron Devices 64 (10), 4295-4301, 2017 | 88 | 2017 |
| Spintronic processing unit in spin transfer torque magnetic random access memory H Zhang, W Kang, K Cao, B Wu, Y Zhang, W Zhao IEEE Transactions on Electron Devices 66 (4), 2017-2022, 2019 | 55 | 2019 |
| Field-free switching of perpendicular magnetization through voltage-gated spin-orbit torque SZ Peng, JQ Lu, WX Li, LZ Wang, H Zhang, X Li, KL Wang, WS Zhao 2019 IEEE International Electron Devices Meeting (IEDM), 28.6. 1-28.6. 4, 2019 | 54 | 2019 |
| Spintronic processing unit within voltage-gated spin Hall effect MRAMs H Zhang, W Kang, B Wu, P Ouyang, E Deng, Y Zhang, W Zhao IEEE Transactions on Nanotechnology 18, 473-483, 2019 | 27 | 2019 |
| Spintronic computing-in-memory architecture based on voltage-controlled spin–orbit torque devices for binary neural networks H Wang, W Kang, B Pan, H Zhang, E Deng, W Zhao IEEE Transactions on Electron Devices 68 (10), 4944-4950, 2021 | 20 | 2021 |
| HD-CIM: Hybrid-device computing-in-memory structure based on MRAM and SRAM to reduce weight loading energy of neural networks H Zhang, J Liu, J Bai, S Li, L Luo, S Wei, J Wu, W Kang IEEE Transactions on Circuits and Systems I: Regular Papers 69 (11), 4465-4474, 2022 | 15 | 2022 |
| Spintronic memories: From memory to computing-in-memory W Kang, H Zhang, W Zhao 2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 1-2, 2019 | 14 | 2019 |
| A spintronic in-memory computing network for efficient hamming codec implementation L Jiang, E Deng, H Zhang, Z Wang, W Kang, W Zhao IEEE Transactions on Circuits and Systems II: Express Briefs 69 (4), 2086-2090, 2022 | 11 | 2022 |
| High-density and fast-configuration non-volatile look-up table based on NAND-like spintronic memory H Zhang, W Kang, Z Wang, E Deng, Y Zhang, W Zhao 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 382-385, 2018 | 8 | 2018 |
| A full-sensing-margin dual-reference sensing scheme for deeply-scaled STT-RAM H Zhang, W Kang, Y Zhang, MF Chang, W Zhao IEEE Access 6, 64250-64260, 2018 | 7 | 2018 |
| Advanced low power spintronic memories beyond STT-MRAM W Kang, Z Wang, H Zhang, S Li, Y Zhang, W Zhao Proceedings of the on Great Lakes Symposium on VLSI 2017, 299-304, 2017 | 7 | 2017 |
| CP-SRAM: charge-pulsation SRAM marco for ultra-high energy-efficiency computing-in-memory H Zhang, L Jiang, J Wu, T Chen, J Liu, W Kang, W Zhao Proceedings of the 59th ACM/IEEE Design Automation Conference, 109-114, 2022 | 6 | 2022 |
| SpinLiM: Spin orbit torque memory for ternary neural networks based on the logic-in-memory architecture L Luo, H Zhang, J Bai, Y Zhang, W Kang, W Zhao 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 6 | 2021 |
| A mini tutorial of processing in memory: From principles, devices to prototypes B Pan, G Wang, H Zhang, W Kang, W Zhao IEEE Transactions on Circuits and Systems II: Express Briefs 69 (7), 3044-3050, 2022 | 5 | 2022 |
| A 40nm 33.6 tops/w 8t-sram computing-in-memory macro with dac-less spike-pulse-truncation input and adc-less charge-reservoir-integrate-counter output H Zhang, J Liu, W Kang, Y Fan, S Fu, J Bai, B Pan, Y Liu, W Zhao 2021 IEEE International Conference on Integrated Circuits, Technologies and …, 2021 | 5 | 2021 |
| Dual reference sensing scheme with triple steady states for deeply scaled STT-MRAM H Zhang, W Kang, T Pang, W Lv, Y Zhang, W Zhao 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 1-6, 2016 | 5 | 2016 |
| Toward energy-efficient sparse matrix-vector multiplication with near STT-MRAM computing architecture Y Li, H Zhang, X Wang, H Cai, Y Zhang, S Lv, R Liu, W Zhao Proceedings of the 28th Asia and South Pacific Design Automation Conference …, 2023 | 4 | 2023 |
| Linear error correction codec implementation based on an in-memory computing architecture for nonvolatile memories L Luo, X Liu, L Jiang, H Zhang, Y Zhang, D Liu, W Kang IEEE Transactions on Electron Devices 69 (6), 3455-3461, 2022 | 4 | 2022 |
| High-density, low-power voltage-control spin orbit torque memory with synchronous two-step write and symmetric read techniques H Wang, W Kang, L Zhang, H Zhang, BK Kaushik, W Zhao 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 4 | 2020 |
| Programmable stateful in-memory computing paradigm via a single resistive device W Kang, H Zhang, P Ouyang, Y Zhang, W Zhao 2017 IEEE International Conference on Computer Design (ICCD), 613-616, 2017 | 4 | 2017 |
Wang KangBeihang University在 buaa.edu.cn 的电子邮件经过验证
Wang KangBeihang University在 buaa.edu.cn 的电子邮件经过验证
Weisheng ZhaoFert Beijing Institute, Beihang University在 buaa.edu.cn 的电子邮件经过验证