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John Emmert
John Emmert
University of Cincinnati; Wright State University; University of North Carolina Charlotte
在 ucmail.uc.edu 的电子邮件经过验证
标题
引用次数
引用次数
年份
Dynamic fault tolerance in FPGAs via partial reconfiguration
J Emmert, C Stroud, B Skaggs, M Abramovici
Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing …, 2000
1792000
A survey of fault tolerant methodologies for FPGAs
JA Cheatham, JM Emmert, S Baumgart
ACM Transactions on Design Automation of Electronic Systems (TODAES) 11 (2 …, 2006
1552006
Online fault tolerance for FPGA logic blocks
JM Emmert, CE Stroud, M Abramovici
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (2), 216-226, 2007
1492007
Roving STARs: an integrated approach to on-line testing, diagnosis, and fault tolerance for FPGAs in adaptive computing systems
M Abramovici, JM Emmert, CE Stroud
Proceedings Third NASA/DoD Workshop on Evolvable Hardware. EH-2001, 73-92, 2001
1162001
Online BIST and BIST-based diagnosis of FPGA logic blocks
M Abramovici, CE Stroud, JM Emmert
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (12 …, 2004
962004
Fault tolerant operation of reconfigurable devices utilizing an adjustable system clock
M Abramovici, JM Emmert, CE Stroud
US Patent 6,874,108, 2005
802005
Incremental routing in FPGAs
JM Emmert, D Bhatia
Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No …, 1998
801998
Using embedded FPGAs for SoC yield improvement
M Abramovici, C Stroud, M Emmert
Proceedings of the 39th Annual Design Automation Conference, 713-724, 2002
712002
Improving on-line BIST-based diagnosis for roving STARs
M Abramovici, C Stroud, B Skaggs, J Emmert
Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No …, 2000
542000
Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement
JM Emmert, D Bhatia
International Workshop on Field Programmable Logic and Applications, 141-150, 1997
471997
Fault tolerant operation of field programmable gate arrays
M Abramovici, JM Emmert, CE Stroud
US Patent 6,973,608, 2005
452005
On-line BIST and diagnosis of FPGA interconnect using roving STARs
C Stroud, M Lashinsky, J Nall, J Emmert, M Abramovici
Proceedings Seventh International On-Line Testing Workshop, 27-33, 2001
452001
An FFT approximation technique suitable for on-chip generation and analysis of sinusoidal signals
JM Emmert, JA Cheatham, B Jagannathan, S Umarani
Proceedings 18th IEEE Symposium on Defect and Fault Tolerance in VLSI …, 2003
392003
A methodology for fast FPGA floorplanning
JM Emmert, D Bhatia
Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field …, 1999
371999
On-line fault tolerant operation via incremental reconfiguration of field programmable gate arrays
M Abramovici, CE Stroud, JM Emmert
US Patent 6,530,049, 2003
312003
Bridging fault extraction from physical design data for manufacturing test development
CE Stroud, JM Emmert, JR Bailey, KS Chhor, D Nikolic
Proceedings International Test Conference 2000 (IEEE Cat. No. 00CH37159 …, 2000
312000
A new bridging fault model for more accurate fault behavior
JM Emmert, CE Stroud, JR Bailey
2000 IEEE Autotestcon Proceedings. IEEE Systems Readiness Technology …, 2000
302000
Design and performance of a robust 180 nm CMOS standalone VCO and the integrated PLL
S Ren, J Emmert, R Siferd
Analog Integrated Circuits and Signal Processing 68, 285-298, 2011
242011
A fault tolerant technique for FPGAs
JM Emmert, DK Bhatia
Journal of Electronic Testing 16 (6), 591-606, 2000
212000
Tabu search: Ultra-fast placement for FPGAs
JM Emmert, DK Bhatia
Field Programmable Logic and Applications: 9th International Workshop, FPL …, 1999
191999
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