| Processing system and method for chemically treating a tera layer A Mosden, A Yamashita US Patent App. 11/486,105, 2006 | 175 | 2006 |
| A novel dry selective etch of SiGe for the enablement of high performance logic stacked gate-all-around nanosheet devices N Loubet, S Kal, C Alix, S Pancharatnam, H Zhou, C Durfee, M Belyansky, ... 2019 IEEE International Electron Devices Meeting (IEDM), 11.4. 1-11.4. 4, 2019 | 81 | 2019 |
| Multi-layer pattern for alternate ALD processes DL O'meara, A Mosden US Patent 8,809,169, 2014 | 52 | 2014 |
| Batch processing system and method for performing chemical oxide removal S Cabral, A Mosden, Y Lee US Patent App. 11/390,470, 2007 | 41 | 2007 |
| Method of etching high aspect ratio features A Mosden, S Hyland, M Kajimoto US Patent 7,226,868, 2007 | 39 | 2007 |
| Multilayer sidewall spacer for seam protection of a patterned structure DL O'meara, A Dip, A Mosden, PH Chou, RA Conti US Patent 8,673,725, 2014 | 29 | 2014 |
| Replacing chamber components in a vacuum environment A Mosden US Patent App. 10/803,805, 2005 | 29 | 2005 |
| System and method of removing chamber residues from a plasma processing system in a dry cleaning process M Gaudet, A Mosden, RJ Soave US Patent 7,959,970, 2011 | 27 | 2011 |
| Nondestructive characterization of nanoscale subsurface features fabricated by selective etching of multilayered nanowire test structures using Mueller matrix spectroscopic … M Korde, S Kal, C Alix, N Keller, GA Antonelli, A Mosden, AC Diebold Journal of Vacuum Science & Technology B 38 (2), 2020 | 21 | 2020 |
| Processing system and method for chemically treating a TERA layer A Mosden, A Yamashita US Patent 7,097,779, 2006 | 20 | 2006 |
| Deep learning acceleration in 14nm CMOS compatible ReRAM array: device, material and algorithm co-optimization N Gong, MJ Rasch, SC Seo, A Gasasira, P Solomon, V Bragaglia, ... 2022 International Electron Devices Meeting (IEDM), 33.7. 1-33.7. 4, 2022 | 17 | 2022 |
| Gas phase etch with controllable etch selectivity of Si-containing arc or silicon oxynitride to different films or masks S Kal, N Mohanty, AD Raley, A Mosden, SW LeFevre US Patent 10,971,372, 2021 | 13 | 2021 |
| Strategies for aggressive scaling of EUV multi-patterning to sub-20 nm features A Dutta, J Church, J Lee, B O’Brien, L Meli, CC Liu, S Sharma, K Petrillo, ... Extreme Ultraviolet (EUV) Lithography XI 11323, 213-224, 2020 | 13 | 2020 |
| Method and system for selective spacer etch for multi-patterning schemes S Kal, AD Raley, N Mohanty, A Mosden US Patent 9,748,110, 2017 | 13 | 2017 |
| Dual sidewall spacer for seam protection of a patterned structure DL O'meara, A Dip, A Mosden, PH Chou, RA Conti US Patent 8,664,102, 2014 | 13 | 2014 |
| Isotropic silicon and silicon-germanium etching with tunable selectivity S Kal, KN Tapily, A Mosden US Patent 9,984,890, 2018 | 11 | 2018 |
| Method and system for treating a hard mask to improve etch characteristics A Mosden, D Phan US Patent 7,291,446, 2007 | 11 | 2007 |
| Method and system for deep trench silicon etch S Panda, A Mosden, R Wise, K Sugiyama, J Camilleri US Patent App. 10/821,201, 2004 | 10 | 2004 |
| Effect of rare gas addition on deep trench silicon etch S Panda, R Wise, A Mosden, K Sugiyama, J Camilleri Microelectronic engineering 75 (3), 275-284, 2004 | 10 | 2004 |
| Highly selective SiGe dry etch process for the enablement of stacked nanosheet gate-all-around transistors C Durfee, S Kal, S Pancharatnam, M Bhuiyan, I Otto IV, M Flaugh, J Smith, ... ECS Transactions 104 (4), 217, 2021 | 9 | 2021 |
